2016
DOI: 10.1007/s00339-016-0239-9
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Influence of gate metal engineering on small-signal and noise behaviour of silicon nanowire MOSFET for low-noise amplifiers

Abstract: In this paper, we have investigated the smallsignal behaviour and RF noise performance of gate electrode workfunction engineered (GEWE) silicon nanowire (SiNW) MOSFET, and the results so obtained are simultaneously compared with SiNW and conventional MOS-FET at THz frequency range. This work examines reflection and transmission coefficients, noise conductance, minimum noise figure and cross-correlation factor. Results reveal significant reduction in input/output reflection coefficient and an increase in forwar… Show more

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Cited by 25 publications
(2 citation statements)
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References 33 publications
(28 reference statements)
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“…8,9 The interaction between hydrogen gas and a thin Pd layer is possible. [10][11][12] To increase the sensitivity of FET-based sensors, multiple microelectronic devices, such as floating gate MOSFETs, 13 Palladium (Pd) gate MOSFETs, 14 dual gate mosfets, 15 nanowire mosfets 16 etc., have been developed. Cao A et al suggested a silicon nanowire-based H 2 gas sensor to satisfy the need for H2 gassensing.…”
mentioning
confidence: 99%
“…8,9 The interaction between hydrogen gas and a thin Pd layer is possible. [10][11][12] To increase the sensitivity of FET-based sensors, multiple microelectronic devices, such as floating gate MOSFETs, 13 Palladium (Pd) gate MOSFETs, 14 dual gate mosfets, 15 nanowire mosfets 16 etc., have been developed. Cao A et al suggested a silicon nanowire-based H 2 gas sensor to satisfy the need for H2 gassensing.…”
mentioning
confidence: 99%
“…However, in MOSFETs, the endless scaling beyond 100 nm nodes resulted in various small-dimension effects such as mobility degradation, drain-induced barrier lowering (DIBL), hot-carrier effect (HCE), parasitic capacitances etc. These short channel effects (SCEs) are the main cause of unwanted off-state leakages, 9 linearity distortion, 7 high frequency noise 3,8 and therefore deteriorates the overall system performance.There are various solutions available in recent literatures to overcome these short dimension effects and also various research groups are continuously working to improve the performance of nanoscaled MOS devices. [10][11][12][13][14][15][16] Recently, conventionally used Si substrates are found in-effective below 100 nm technology node and result in various off-state leakages and DIBL.…”
mentioning
confidence: 99%