Influence of litho patterning on DSA placement errors

Wuister, Sander F.; Druzhinina, Tamara S.; Ambesi, Davide; Laenens, Bart; Yi, Linda He; Finders, Jo

doi:10.1117/12.2048065

Cited by 8 publications

(9 citation statements)

References 8 publications

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“…2 This paper uses a property of the DSA process, which can be exploited to reduce these imperfections in DUV or EUV patterning by improving the process windows of DUV/EUV processes. Imperfections in DUV or EUV patterning of the guiding DSA patterns, caused by process variations in DUV or EUV lithography, is one important contributor to the placement error of DSA features, particularly in the case of the graphoepitaxy DSA process for vias.…”

Section: Introductionmentioning

confidence: 99%

“…ðf; M p Þ; (2) where the term marked with superscripts "(ET)" combines the contributions from the etch-transferable features, and the term marked "(ER)" combines the contributions coming from the etch-resistant features. For etch-transferrable features, minimizing the edge placement error and its variation through the process conditions contributes to the improvement of the process window of the combined DUVL and DSA processes.…”

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confidence: 99%

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Improving the lithographic process window using directed self-assembly-aware printing assist features

Latypov

Coskun

2015

J. Micro/Nanolith. MEMS MOEMS

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Variation in the shape of directed self-assembly (DSA) prepatterns caused by lithographical process variability is one of the significant contributors to the placement error in DSA patterning. DSA-aware printing assist features (PrAFs) can be used to reduce the sensitivity of DSA prepatterns to lithographical process variability, with the printed sidelobes resulting from these PrAFs being "sealed" during the DSA step of the process. For instance, in a graphoepitaxy DSA process, where confinement wells are formed by deep ultraviolet (DUV) lithography, the process window of the DUV lithography process may be improved by using PrAFs, as long as the confinement wells resulting from these PrAFs are sized and shaped so that they do not etch transfer into the substrate due to etch-resistant outcomes of the DSA process. A method to optimize the placement of these DSA-aware PrAFs is presented, along with a method utilizing a regular array of etch-resistant confinement wells with localized modifications of their size or shape to form etch-transferrable features. Both methods are tested and verified in simulations of DUV lithography and DSA.Latypov and Coskun: Improving the lithographic process window using directed self-assembly-aware. . . DownloadedFrom: http://nanolithography.spiedigitallibrary.org/ on 08/18/2015 Terms of Use: http://spiedigitallibrary.org/ss/TermsOfUse.aspx Latypov and Coskun: Improving the lithographic process window using directed self-assembly-aware. . . Downloaded From: http://nanolithography.spiedigitallibrary.org/ on 08/18/2015 Terms of Use: http://spiedigitallibrary.org/ss/TermsOfUse.aspx Latypov and Coskun: Improving the lithographic process window using directed self-assembly-aware. . . Downloaded From: http://nanolithography.spiedigitallibrary.org/ on 08/18/2015 Terms of Use: http://spiedigitallibrary.org/ss/TermsOfUse.aspx Latypov and Coskun: Improving the lithographic process window using directed self-assembly-aware. . . Downloaded From: http://nanolithography.spiedigitallibrary.org/ on 08/18/2015 Terms of Use: http://spiedigitallibrary.org/ss/TermsOfUse.aspx Latypov and Coskun: Improving the lithographic process window using directed self-assembly-aware. . . Downloaded From: http://nanolithography.spiedigitallibrary.org/ on 08/18/2015 Terms of Use: http://spiedigitallibrary.org/ss/TermsOfUse.aspx Latypov and Coskun: Improving the lithographic process window using directed self-assembly-aware. . . Downloaded From: http://nanolithography.spiedigitallibrary.org/ on 08/18/2015 Terms of Use: http://spiedigitallibrary.org/ss/TermsOfUse.aspx

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Section: Introductionmentioning

confidence: 99%

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confidence: 99%

Improving the lithographic process window using directed self-assembly-aware printing assist features

Latypov

Coskun

2015

J. Micro/Nanolith. MEMS MOEMS

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“…The other issue is the placement error of the PMMA cylinder, which is caused by the thermal fluctuations of diblock copolymer and by the shape variation of guide hole. [14][15][16][17] From the analysis of the top-down scanning electron microscope (SEM) images, the minimum placement error of the PMMA cylinder in a cylindrical guide hole is estimated on the order of ∼2-3 nm. [14][15][16][17] This value is barely satisfied with the registration specs required for future semiconductor manufacturing.…”

Section: Introductionmentioning

confidence: 99%

Effects of thermal fluctuations and block copolymers compositions on defects in directed self-assembly hole shrink process

Fukawatase¹,

Yoshimoto²,

Ohshima³

2015

Jpn. J. Appl. Phys.

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We investigated the two critical defects on the directed self-assembly hole shrink process, i.e., polystyrene (PS) residue and placement error, by performing dynamic simulations with the Ohta-Kawasaki model. In the simulations, the thermal noise was added to generate stochastic variations in shape and location of the poly(methyl methacrylate) (PMMA) cylindrical domains. For the PS residue issue, we found that the volume fraction of the PMMA minor block, f PMMA , was an effective parameter, and that the PS residue could be minimized by increasing f PMMA from a conventional value of 0.30 to 0.40. On the other hand, the placement error of the PMMA cylindrical domain was affected little by the change in shape and size of the guide hole and by the connectivity to the guide bottom wall. It is speculated that the interfacial stiffness between the PMMA and PS domains would be essential to control the placement error of the PMMA cylindrical domains.

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“…This strategy also points to an important research direction: IC layouts can be further optimized to improve the yield and accuracy of DSA process. Topics including the minimization and the optimization of the alphabet set, DSA hotspot detection, as well as the combination of lithography simulation and template design are receiving attention from researchers and waiting to be explored thoroughly. Challenges such as optimizing and tuning the template design based on overlay, defectivity, and lithography requirements will need to be further investigated in order for practical implementation in industry.…”

mentioning

confidence: 99%

A General Design Strategy for Block Copolymer Directed Self-Assembly Patterning of Integrated Circuits Contact Holes using an Alphabet Approach

Bao

Tiberio

et al. 2015

Nano Lett.

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Directed self-assembly (DSA) is a promising lithography candidate for technology nodes beyond 14 nm. Researchers have shown contact hole patterning for random logic circuits using DSA with small physical templates. This paper introduces an alphabet approach that uses a minimal set of small physical templates to pattern all contacts configurations on integrated circuits. We illustrate, through experiments, a general and scalable template design strategy that links the DSA material properties to the technology node requirements.

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Influence of litho patterning on DSA placement errors

Cited by 8 publications

References 8 publications

Improving the lithographic process window using directed self-assembly-aware printing assist features

Improving the lithographic process window using directed self-assembly-aware printing assist features

Effects of thermal fluctuations and block copolymers compositions on defects in directed self-assembly hole shrink process

A General Design Strategy for Block Copolymer Directed Self-Assembly Patterning of Integrated Circuits Contact Holes using an Alphabet Approach

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