Influence of magnetization variations in the free layer on a non-volatile magnetic flip flop

Windbacher, Thomas; Makarov, Alexander; Sverdlov, Viktor; Selberherr, S.

doi:10.1016/j.sse.2014.12.023

Cited by 6 publications

(3 citation statements)

References 17 publications

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“…Thus, it is possible to reduce the required structural complexity and benefit from the resulting extremely dense layout foot prints. A series of simulation studies were carried out to investigate the capabilities and limits of the NVMFF [229][230][231][232][233]. It also led to the proposal of a novel buffered magnetic logic gate grid which will be explained in detail in the following.…”

Section: All-spin Logicmentioning

confidence: 99%

CMOS-compatible spintronic devices: a review

Makarov¹,

Windbacher²,

Sverdlov³

et al. 2016

Semicond. Sci. Technol.

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For many decades CMOS devices have been successfully scaled down to achieve higher speed and increased performance of integrated circuits at lower cost. Today's charge-based CMOS electronics encounters two major challenges: power dissipation and variability. Spintronics is a rapidly evolving research and development field, which offers a potential solution to these issues by introducing novel 'more than Moore' devices. Spin-based magnetoresistive random-access memory (MRAM) is already recognized as one of the most promising candidates for future universal memory. Magnetic tunnel junctions, the main elements of MRAM cells, can also be used to build logic-in-memory circuits with non-volatile storage elements on top of CMOS logic circuits, as well as versatile compact on-chip oscillators with low power consumption. We give an overview of CMOS-compatible spintronics applications. First, we present a brief introduction to the physical background considering such effects as magnetoresistance, spin-transfer torque (STT), spin Hall effect, and magnetoelectric effects. We continue with a comprehensive review of the state-of-the-art spintronic devices for memory applications (STT-MRAM, domain wallmotion MRAM, and spin-orbit torque MRAM), oscillators (spin torque oscillators and spin Hall nano-oscillators), logic (logic-in-memory, all-spin logic, and buffered magnetic logic gate grid), sensors, and random number generators. Devices with different types of resistivity switching are analyzed and compared, with their advantages highlighted and challenges revealed. CMOScompatible spintronic devices are demonstrated beginning with predictive simulations, proceeding to their experimental confirmation and realization, and finalized by the current status of application in modern integrated systems and circuits. We conclude the review with an outlook, where we share our vision on the future applications of the prospective devices in the area.

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Section: All-spin Logicmentioning

confidence: 99%

CMOS-compatible spintronic devices: a review

Makarov¹,

Windbacher²,

Sverdlov³

et al. 2016

Semicond. Sci. Technol.

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“…Our simulations show not only that the device works under ideal conditions, but is also able to tolerate quite high levels of static and thermal disturbances (12). Fig.…”

Section: Simulation Setupmentioning

confidence: 71%

“…To proof the devices' operability, we carried out a series of rigorous simulation studies (6,11,12). The required physical model is covered by the Landau-Lifshitz-Gilbert equation (13,14) , [1] with denoting the reduced magnetization, the electron gyromagnetic ratio, the dimensionless damping constant, and the effective field.…”

Section: Ecs Transactions 66 (4) 295-303 (2015)mentioning

confidence: 99%

Novel Buffered Magnetic Logic Gate Grid

et al. 2015

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The nowadays performance limiting power dissipation due to leakage has become a critical burden. A simple way to reduce power dissipation is to shut down idle circuit parts. However, when hibernated circuit parts are activated again, their previous state must be recovered. In order to avoid energy and time consuming recovery cycles non-volatile elements must be added to realize the desired instant ON capability. In this work the combination of nonvolatile magnetic flip flops and spin transfer torque majority gates to a novel buffered magnetic logic grid is proposed. The buffered logic grid features a highly regular structure, a small layout foot print, and it reduces the information transport due to its shared buffer. The realization of an easily concatenable one-bit full adder based on the novel buffered magnetic logic gate grid is explained.

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