Influence of the UV Cure on Advanced Plasma Enhanced Chemical Vapour Deposition Low-<i>k</i>Materials

Verdonck, Patrick; Besien, Els Van; Vanstreels, Kris; Trompoukis, Christos; Urbanowicz, Adam; Roest, David De; Baklanov, Mikhaı̈l R.

doi:10.7567/jjap.50.05eb05

Cited by 4 publications

(1 citation statement)

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“…It seems however that there is a limit to values around 1.9-2.0 due to pore collapsing at higher porogen loadings. 32,58,59 As a result, the list of potentially viable low-k candidates has narrowed substantially over the years. For advanced and future technologies nodes below 10 nm, the PECVD technology will no longer be able to satisfy all the integration requirements due to the uncontrollable process of pore formation and the porogen residues that are formed during the UV curing process.…”

Section: Low-k Dielectrics For Future Technology Nodesmentioning

confidence: 99%

Mechanical Stability of Porous Low-k Dielectrics

Vanstreels

Baklanov

2014

ECS J. Solid State Sci. Technol.

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This paper reviews the mechanical and fracture properties of porous ultralow-k dielectrics with the focus on chip package interaction related issues. It is shown that the mechanical and fracture properties of porous ultralow-k dielectric films are closely linked with porosity, pore morphology, network structure and deposition technology, while their fracture properties are also sensitive to reactive species in the environment. The survivability of low-k dielectrics upon integration, package assembly and subsequent reliability tests is therefore a combination of their mechanical stability, fracture properties, the specific mechanical or thermo-mechanical load and environmental effects. For the past three decades, the semiconductor industry has been improving the performance of microelectronic devices and the functionality of advanced integrated circuits through the continuous scaling of integrated circuits and the maximization of transistor density.1 Consequently, this encourages the introduction of new materials, processes, chip designs, and packaging strategies into micro-/nano-electronic products. Among these material innovations are insulating materials with a dielectric constant (k) less than that of SiO 2 , so called low-k dielectrics. During the last 15 years, various materials and methods have been developed for fabricating low-k dielectric films, among which the plasma enhanced chemical vapor deposition (PECVD) technology of porous organosilicate glasses (OSG) is the most popular due to its better compatibility with the technological needs.2-5 The reduction in k for low-k dielectrics is being pursued through the introduction of controlled levels of porosity. However, finding a good low-k material has proven to be much more challenging than first expected due to a number of integration and reliability issues.1 Besides the need of being compatible with the different lithography, etching, stripping and cleaning processes that are used in state-of-the-art integration schemes, they must also have sufficient mechanical strength to withstand the high shear stresses as well as harsh chemical environments that are involved during the chemical mechanical polishing process without cohesive or adhesive failure occurring.6-8 On top of that, since low-k dielectrics exhibit intrinsic tensile stresses and have increased coefficients of thermal expansion compared to SiO 2 , thin film cracking and adhesion are serious thermal-mechanical reliability issues for low-k dielectric materials (Figure 1). 9,10 Thermo-mechanical deformation of the package during package assembly and subsequent reliability tests can induce large local stresses that can initiate and propagate cohesive and/or adhesive cracks in different back-end of line (BEOL) layers.11 Therefore, a careful characterization of the mechanical integrity of potential new low-k candidates is required to integrate these new materials and Cu interconnects and to assure reliability during chip packaging and under field conditions. In the microelectronics industry, the elas...

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Section: Low-k Dielectrics For Future Technology Nodesmentioning

confidence: 99%