Infrared readout electronics for space-science sensors: state of the art and future directions

Fossum, Eric R.; Pain, Bedabrata

doi:10.1117/12.160549

Cited by 90 publications

(38 citation statements)

References 35 publications

Supporting

Mentioning

Contrasting

Order By: Relevance

“…The 1/f noise in readout unit cell electronics is an important issue for low background applications involving long integration times. For most unit cell circuits used in IRFPAs, the input-referred noise electrons due to the 1/f noise is directly proportional to integration time, making the IRFPAs noise significantly larger for longer integration times [2]. Other temporal noise sources being of concern for readout electronics are transistor thermal noise and reset noise.…”

Section: Introductionmentioning

confidence: 99%

“…For many mature infrared focal plane array (IRFPA) detector technologies, it is now the readout electronics that limit scientific performance rather than the detector itself. As a general rule, the readout electronics noise is critically important for the IRFPAs' requirements: integration capacity, integration time, dynamic range, responsivity, and the noise equivalent temperature difference (NETD) [2].…”

Section: Introductionmentioning

confidence: 99%

See 1 more Smart Citation

An ultra low noise readout integrated circuit for uncooled microbolometers

Jiang

Zhang

et al. 2009

Analog Integr Circ Sig Process

View full text Add to dashboard Cite

A low noise readout architecture for uncooled microbolometer focal plane arrays is described. The on-chip readout circuit contains an integration circuit in which the bolometer current is directed injected into a capacitor, and exhibits extremely low noise with no decrease in signal by using an ultra low noise capacitive transimpedance amplifier (CTIA). The simple configuration of the integration circuit makes it possible to operate more circuits in parallel, and increases the integration time and number of pixels. A 40 9 30 uncooled microbolometer focal plane array based on the low noise ROIC was implemented on silicon using a 0.5 lm CMOS technology. The total output noise voltage is 260 lV RMS. A noise at this level is so low that can loosen required TCR in the bolometer material. Experimental values of voltage responsivities of 3.98 9 10 5 V/W on average at 1 Hz modulation frequency have been achieved.

show abstract

Section: Introductionmentioning

confidence: 99%

Section: Introductionmentioning

confidence: 99%

An ultra low noise readout integrated circuit for uncooled microbolometers

Jiang

Zhang

et al. 2009

Analog Integr Circ Sig Process

View full text Add to dashboard Cite

show abstract

“…Many current readout circuits for infrared focal plane array (IR FPA) applications have been developed [1,3] to satisfy the requirement of stable detector bias, high injection efficiency, large dynamic range, small area, + and low power consumption. These circuits are composed of self-integration (SI), direct injection (DI), source follower per detector (SFD), gate modulation input (GMI), buffered direct injection (BDI), capacitive feedback transimpedance amplifier (CTIA), switched current integration (SCI), buffered gate modulation input (BGMI), current mirror direct injection (CMDI) [14], and current mirror integration (CMI) [6] elements.…”

Section: Introductionmentioning

confidence: 99%

CMOS Readout Circuit with New Background Suppression Technique for Room-Temperature Infrared FPA Applications

Yao

Zhao

2010

Circuits Syst Signal Process

View full text Add to dashboard Cite

A high-performance CMOS readout integrated circuit (ROIC) with a new temperature and power supply independent background current and dark current suppression technique for room-temperature infrared focal plane array applications is proposed. The structure is composed of an improved switched current integration stage, a new current-mode background suppression circuit, and a high linearity, high voltage swing output stage. An experimental readout chip has been designed and fabricated using the Chartered 0.35 µm CMOS process. Both the function and performance of the proposed readout circuit have been verified by experimental results. The test results show that the detector bias error in this structure is less than 0.1 mV. The input resistance is close to an ideal value of zero, and the injection efficiency is almost 100%. The output voltage linearity of the designed circuit is more than 99%. The background suppression level is tunable between 8 nA-1.5 µA, and the background suppression uniformity is as high as 100%. A unit-cell occupies a 10 µm × 15 µm area and consumes less than 0.07 mW power.

show abstract

“…21 Random noise sources are composed of photon shot noise of the incident light, shot noise of the dark current, reset noise of the pixels in the array, and current and voltage noise of the preamplifier. 22 Two other sources of noise are identified in the literature: the amplifier glow noise 23 and popcorn noise. 24 These two sources are not covered here.…”

Section: Operation Of Ingaas Linear Arrays Recent Advances Inmentioning

confidence: 99%