InGaAs tunnel diodes for the calibration of semi-classical and quantum mechanical band-to-band tunneling models

Abstract

Promising predictions are made for III-V tunnel-field-effect transistor (FET), but there is still uncertainty on the parameters used in the band-to-band tunneling models. Therefore, two simulators are calibrated in this paper; the first one uses a semi-classical tunneling model based on Kane's formalism, and the second one is a quantum mechanical simulator implemented with an envelope function formalism. The calibration is done for In 0.53 Ga 0.47 As using several pþ/intrinsic/nþ diodes with different intrinsic region thicknesses. The dopant profile is determined by SIMS and capacitance-voltage measurements. Error bars are used based on statistical and systematic uncertainties in the measurement techniques. The obtained parameters are in close agreement with theoretically predicted values and validate the semi-classical and quantum mechanical models. Finally, the models are applied to predict the input characteristics of In 0.53 Ga 0.47 As n-and p-lineTFET, with the n-lineTFET showing competitive performance compared to MOSFET. V

Staggered band gap n+In0.5Ga0.5As/p+GaAs0.5Sb0.5 Esaki diode investigations for TFET device predictions

“…1(a). Calibrated simulations showed that an In 0.5 Ga 0.5 As homojunction line-TFET can achieve I on ¼ 200 mA/mm 2 for V dd ¼ 0.5 V which is significantly better than for Silicon TFET [4]. Nevertheless, different material systems with even higher BTBT generation rates are desirable to further improve electrical performances with higher boost I on and lower SS.…”

“…In this vein, we have recently proposed a BTBT measurement method using highly doped Esaki tunnel diodes as a simple way to have an accurate device prediction [4]. This way, besides the complex TFET device fabrication, the high-k/semiconductor interface problems are avoided.…”

“…This allows a higher ratio of on-current to off-current (I on /I off ) at reduced operating voltage V dd (o0.5 V) as compared to the state of the art FinFET devices which are considered nowadays key in power consumption scaling [3]. Major studies are pointing towards III-V hetero configurations as ideal material systems in order for TFET to be competitive with MOSFET [1][2][3][4][5][6][7][8][9][10]. However, III-V TFET still show inconsistency in measured vs. simulated I on /I off and subthreshold characteristics [2].…”

The impact of the temperature on In0.53Ga0.47As nTFETs

“…This competition of factors can be better observed using numerical simulations, using an Sentaurus Device simulator [38]. The simulations were performed for a uniform In 0.53 Ga 0.47 As channel device, considering dopant-dependent SRH, Schenk's non-local TAT, non-local BTBT, and bandgap narrowing models, which parameters where obtained in [39]. Figure 8 presents the simulated I DS as a function of V GS , separating the influence of the thermally activated mechanisms (TAT and SRH) and BTBT.…”

Extracting the effective bandgap of heterojunctions using Esaki diode I-V measurements

“…Diodes with junction areas A j ¼ 0.01-2 lm 2 are fabricated according to the process flow in Ref. 21. We measure the diode I-V characteristics with an Agilent 4156C parameter analyzer.…”