InP DHBT based MMICs for [DC-20 GHz] Signal Sampling

Aabbaoui, Hassan El; Gorisse, B.; Benlarbi-Delaï, Aziz; Rolland, N.; Allouche, V.; Fel, N.; Riondet, Bernard; Leclerc, P.; Rolland, P.A.

doi:10.1109/emicc.2006.282757

Cited by 2 publications

(2 citation statements)

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“…We then insert time delay elements on the trigger line to create different sampling instants and the inserted delay corresponds to the sampling period. This structure has been well described in [8]- [11]. 2) "clock-propagation-line" architecture In this second architecture, the analysed signal and the trigger signal propagate in the opposite direction (Fig.…”

Section: ) "Delay-cell" Architecturementioning

confidence: 97%

“…Therefore the number of track-and-hold circuits is limited to 5 along a single signal line. To increase the number of track-and-hold circuits, a regenerative amplifier could be periodically inserted in the propagation line [11] but this solution has many disadvantages: the design of this amplifier is critical and it adds a delay in the signal propagation. In the "delay-cell" architecture this delay can be cancelled by adding a same-time-delay element in the trigger structure.…”

Section: Propagation Linementioning

confidence: 99%

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Jitter analysis of electrical samplers based on a propagation line

Gorisse¹,

Aabbaoui²,

Rolland³

et al. 2007

2007 European Microwave Conference

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The aim of this paper is to demonstrate the good jitter performances of samplers based on a propagation line. Targeting high resolution and high bandwidth (10 effective bits at 8 GHz and 20 GHz bandwidth) two of these architectures have been adapted to large temporal sampling windows. As the trigger structures consist of inverters, the jitter of an elementary inverter is optimized and a delay cell is simulated and compared to measurements. Jitter of the two trigger structures is discussed. I. INTRODUCTIONRecent years have seen the incoming of a large panel of new high bandwidth sampling systems [1]-[6]. Many applications are concerned such as UWB communications, software radio and nuclear experiments. But most of the time the resolution of these systems is lower than 5 effective bits and big volume and energy are required, especially for optical solutions [1]- [3]. The main goal of our study is to improve the resolution of sampling systems, expecting 10 effective bits at 8 GHz with a 20 GHz bandwidth. Promising results were obtained with samplers based on a propagation line [7]-[9] but they have only been used for single shot applications. In order to use these architectures for large temporal sampling windows, this work deals with trigger structures.To reach very good performances, InP-InGaAs-InP Double Heterojunction Bipolar Transistors (DHBT) have been chosen. This technology provides very short rise and fall time (less than 10 ps on a 50 Ω matched load), low noise and high breakdown voltages. According to [12] it appears to be the most efficient technology for high performances samplers and results of a subsampling track-and-hold amplifier using InP SHBT confirm this figure, [13].Three main parameters influence sampler performances: noise, non-linearity and jitter. At high frequency the jitter effects are prevailing and this parameter in the trigger structure will be studied herein. This work first describes the two sampling architectures chosen to achieve good performances. As the trigger structure is composed of inverters, in a second part the jitter of inverters is discussed and compared to measured results. Finally the trigger structures of the two studied architectures are detailed and simulated. InP DHBT technology of the OMMIC foundry was used for these designs.

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Section: ) "Delay-cell" Architecturementioning

confidence: 97%

Section: Propagation Linementioning

confidence: 99%