Insertion of a Si layer to reduce operation current for resistive random access memory applications

Abstract

In this study, a reduction of low resistive state (LRS) current is discovered in a V:SiO2/Si bi-layer structure with the addition of a Si layer. A Pt/V:SiO2/TiN structure is fabricated as the standard sample. The results of conduction mechanism analyses for LRS indicate that a SiO2 interfacial layer forms through oxidation of the inserted Si layer after the set process. The LRS current reduction can be attributed to the formation of this SiO2 layer. In addition, self-compliance behavior for the bi-layer structure during the set process further proves the existence of this SiO2 buffer layer in LRS.

Solution-Processable 2D Polymer/Graphene Oxide Heterostructure for Intrinsic Low-Current Memory Device

“…The performance of GO-based memories could be fine-tuned via changing functional groups (such as −COOH, −OH, and −CO), anchoring defect sites (N, S, and B doping), , and constructing hybrid structures, as well as combining inert/active metal electrodes. , However, the programming currents of most of these GO-based memories are relatively high, accompanying with a high-power consumption. In order to reduce the current, a bilayer structure by stacking a barrier layer, i.e., Si or graphene layer between the memory layers and electrodes, was developed to minimize programming current and improve switching reliability in memory operations. , The barrier layer was used as “oxygen barriers” to restrain the migration of oxygen ions into electrodes, resulting in a lower current. Note that the Si or graphene layers were normally prepared by sputtering or chemical vapor deposition methods, which limit their low-cost processing.…”

Solid-State Electrochemical Process and Performance Optimization of Memristive Materials and Devices

“…Interface engineering mainly means inserting an additional thin film at the interfaces between electrodes and switching layers or modifying morphology of interfaces to improve the performances of memristors. The additional thin films include AlO x [86][87][88][89][90] resistors and structure-defective graphene [91,92]. For example, Chen et al [88] obtained a lower operating current memory device TiN/Si/V:SiO 2 /Pt by inserting a α-Si thin layer at the TiN/V:SiO 2 interface and Si thin layer being oxidized to SiO x during Forming/Set process as series resistor of the SiO 2 .…”

“…The additional thin films include AlO x [86][87][88][89][90] resistors and structure-defective graphene [91,92]. For example, Chen et al [88] obtained a lower operating current memory device TiN/Si/V:SiO 2 /Pt by inserting a α-Si thin layer at the TiN/V:SiO 2 interface and Si thin layer being oxidized to SiO x during Forming/Set process as series resistor of the SiO 2 . Also, Cho et al [86] utilized the formation of AlO x layer through oxidation of Al layer by O 2 plasma treatment at the PI:PCBM/Al interface to enlarge OFF/ON ratios and reduce operating current in the Al/PI:PCBM/Al devices.…”

Resistive Switching of Plasma–Treated Zinc Oxide Nanowires for Resistive Random Access Memory

“…In order to further improve storage performance such as the retention, stability and homogeneity of switching properties, several schemes have been attempted to control defects in the storage medium and on the interface [ 13 , 14 , 15 , 16 , 17 , 18 , 19 ]. Doping certain elements or embedding nano-particles into the storage medium seems to be a feasible way to rearrange the defects and the storage performance could thus be improved [ 13 , 14 , 15 ].…”

“…Doping certain elements or embedding nano-particles into the storage medium seems to be a feasible way to rearrange the defects and the storage performance could thus be improved [ 13 , 14 , 15 ]. An alternative way is to change interfacial defects by selecting suitable electrodes or by stacking a different storage medium to form a hetero-interface [ 16 , 17 , 18 , 19 ]. Plasma treatment is a widely accepted technique for surface modification due to its physical effects as well as chemical ones on the treated materials.…”