Insights into radiation displacement defect in an insulated-gate bipolar transistor

Kım, Kihyun; Kim, Jungsik

doi:10.1063/5.0041444

Cited by 5 publications

(2 citation statements)

References 21 publications

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“…The source/drain (S/D) and channel doping concentrations were 1 × 10 20 and 5 10 16 cm −3 , respectively. Radiation was randomly located in the semiconductor, and displacement defec mainly degraded devices in the regions where the current flowed [27]. Various displac ment defect positions were considered to identify the worst location of the defects in t FinFET using TCAD simulation [6].…”

Section: Simulation Modeling Methodologymentioning

confidence: 99%

Performance Degradation in Static Random Access Memory of 10 nm Node FinFET Owing to Displacement Defects

Bang

Lee

et al. 2023

Micromachines

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We comprehensively investigate displacement-defect-induced current and static noise margin variations in six-transistor (6T) static random access memory (SRAM) based on a 10 nm node fin field-effect transistor (FinFET) using technology computer-aided design (TCAD). Various defect cluster conditions and fin structures are considered as variables to estimate the worst-case scenario for displacement defects. The rectangular defect clusters capture more widely distributed charges at the fin top, reducing the on- and off-current. The read static noise margin (RSNM) is the most degraded in the pull-down transistor during the read operation. The increased fin width decreases the RSNM due to the gate field. The current per cross-sectional area increases when the fin height decreases, but the energy barrier lowering by the gate field is similar. Therefore, the reduced fin width and increased fin height structure suit the 10 nm node FinFET 6T SRAMs with high radiation hardness.

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Section: Simulation Modeling Methodologymentioning

confidence: 99%

Performance Degradation in Static Random Access Memory of 10 nm Node FinFET Owing to Displacement Defects

Bang

Lee

et al. 2023

Micromachines

Self Cite

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“…In actual irradiation experiments, it is very difficult to create a constant defect concentration in a small specific area. In the previous simulation-based literature [20], it is reported that most of the deterioration due to displacement defects in power devices occurs where current flows. Therefore, we set the displacement defects only in the region where the current flows.…”

Section: Introductionmentioning

confidence: 99%

Influence of Radiation-Induced Displacement Defect in 1.2 kV SiC Metal-Oxide-Semiconductor Field-Effect Transistors

Lee

Kim

et al. 2022

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The effect of displacement defect on SiC metal-oxide-semiconductor field-effect transistors (MOSFETs) due to radiation is investigated using technology computer-aided design (TCAD) simulation. The position, energy level, and concentration of the displacement defect are considered as variables. The transfer characteristics, breakdown voltage, and energy loss of a double-pulse switching test circuit are analyzed. Compared with the shallow defect energy level, the deepest defect energy level with EC − 1.55 eV exhibits considerable degradation. The on-current decreases by 54% and on-resistance increases by 293% due to the displacement defect generated at the parasitic junction field-effect transistor (JFET) region next to the P-well. Due to the existence of a defect in the drift region, the breakdown voltage increased up to 21 V. In the double-pulse switching test, the impact of displacement defect on the power loss of SiC MOSFETs is negligible.

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Simulation study on the influence of metal contact and MOS interface trap states on the electrical characteristics of SiC IGBT

et al. 2023

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A 13 kV class n-channel 4H–SiC trench gate insulated gate bipolar transistor (IGBT) structure is designed based on Silvaco TCAD device simulator tool. The influence of metal/SiC and SiC MOS interface trap states on the static and dynamic characteristics of SiC IGBT devices are systematically studied. It is found that the electrical properties of SiC IGBTs are insensitive to the donor or acceptor traps at the interface of metal/SiC and the donor traps at the SiC/SiO2 interface. However, the acceptor traps at the SiC/SiO2 interface affect the electrical properties of SiC IGBTs greatly. When the acceptor trap density at the SiC/SiO2 interface (Dita) is up to the level of 1012 cm−2·eV−1, the turn-on voltage drop (VCEON) is increased gradually with the augmentation of Dita. The breakdown voltage (VBR) of the device is increased slightly. Further study of the device’s turn-off characteristics shows that the turn-off loss (EOFF) is decreased with the increase in Dita but a large tail current is formed. The mechanism may be that when the electrons are injected from the N+ source region into the N− drift region, the SiC/SiO2 interfacial acceptor traps at the side wall of trench gate capture a large number of electrons. As a result, the minority carrier concentration is decreased, and the conductance modulation effect on the N− drift region is weakened.

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Insights into radiation displacement defect in an insulated-gate bipolar transistor

Cited by 5 publications

References 21 publications

Performance Degradation in Static Random Access Memory of 10 nm Node FinFET Owing to Displacement Defects

Performance Degradation in Static Random Access Memory of 10 nm Node FinFET Owing to Displacement Defects

Influence of Radiation-Induced Displacement Defect in 1.2 kV SiC Metal-Oxide-Semiconductor Field-Effect Transistors

Simulation study on the influence of metal contact and MOS interface trap states on the electrical characteristics of SiC IGBT

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