Integration of MOSFETs with SiGe dots as stressor material

Nanver, L.K.; Jovanović, Vladimir; Biasotto, C.; Moers, J.; Grützmacher, Detlev; Zhang, J.J.; Hrauda, N.; Stoffel, M.; Pezzoli, Fabio; Schmidt, Oliver G.; Miglio, Leo; Kosina, H.; Marzegalli, Anna; Vastola, G.; Mußler, Gregor; Stangl, J.; Bauer, G.; Cingel, Johan van der; Bonera, Emiliano

doi:10.1016/j.sse.2011.01.038

Cited by 16 publications

(13 citation statements)

References 36 publications

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“…One of the heterostructures with QDs application areas is quantum dot field−effect transistor (QDFET) [7][8][9]. But for the realization of all QDs advantages it is necessary to use the latest technological advances.…”

Section: Quantum Dots For Optoelectronic Devicesmentioning

confidence: 99%

Heterostructures with self-organized quantum dots of Ge on Si for optoelectronic devices

Lozovoy

Voytsekhovskiy

Коханенко

et al. 2014

Opto-Electronics Review

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In this paper an analysis of tendencies of Ge on Si quantum dots nanoheterostructures’ usage in different optoelectronic devices such as, for example, solar cells and photodetectors of visible and infra-red regions is carried out; a complex mathematical model for calculation of dependency on growth conditions of self-organized quantum dots of Ge on Si grown using the method of molecular beam epitaxy parameters is described. Ways of segregation effect and underlying layers’ influence are considered. It is shown that for realization of good device characteristics quantum dots should have high density, small sizes, uniformity, and narrow size distribution function. The desirable parameters of arrays of square and rectangular quantum dots for device application are attainable under certain growth conditions.

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Section: Quantum Dots For Optoelectronic Devicesmentioning

confidence: 99%

Heterostructures with self-organized quantum dots of Ge on Si for optoelectronic devices

Lozovoy

Voytsekhovskiy

Коханенко

et al. 2014

Opto-Electronics Review

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“…SiGe islands have been already used in the past as stressors to obtain tensile strain in thin active layers of Si grown on top, because they can be grown richer in Ge as compared to layers, 31 and therefore induce a higher local strain. [32][33][34] Here, we use their perimetral forces to induce a compressive strain 10,35,36 as in the case of the stripes. By molecular-beam epitaxy, an ordered array of self-assembled SiGe islands was grown on a Si(001) substrate.…”

Section: Top-down Approachmentioning

confidence: 99%

Substrate strain manipulation by nanostructure perimeter forces

Bonera

Bollani²,

Chrastina

et al. 2013

Journal of Applied Physics

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Strain analysis in silicon substrates under uniaxial and biaxial stress by convergent beam electron diffractionStrain-induced self-organized growth of nanostructures: From step bunching to ordering in quantum dot superlattices J.Edge forces exerted by epitaxial nanostructures are shown to induce high levels of strain in the substrate. These very high localized forces appear at the perimeter and the resulting strain can be exploited to engineer the functional properties of the substrate. High levels of strain in a Si substrate are induced by SiGe nanostructures, starting from both top-down and bottom-up approaches. Compressive uniaxial strains of up to À0.7% are demonstrated. V C 2013 AIP Publishing LLC.

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“…[1][2][3][4] Continued performance improvement through geometric scaling has faced increasingly difficult challenges. 5,6 Recent research focused on this issue has explored strain engineering that can increase the charge carrier mobility by creating tensile strain in Si with a capping stressor film, 7 local stressors under channel 8 or embedded source/drain stressors. 9,10 In particular, the introduction of an Si 1 − x Ge x buffer layer with a large lattice constant represented by an epitaxial template can successfully generate biaxial tensile strain in Si.…”

Section: Introductionmentioning

confidence: 99%

Mobility enhancement of strained Si transistors by transfer printing on plastic substrates

et al. 2016

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Strain engineering has been utilized to overcome the limitation of geometric scaling in Si-based thin-film transistor (TFT) technology by significantly improving carrier mobility. However, current strain engineering methods have several drawbacks: they generate atomic defects in the interface between Si and strain inducers, they involve high-cost epitaxial depositions and they are difficult to apply to flexible electronics with plastic substrates. Here, we report the formation of a strained Si membrane with oxidation-induced residual strain by releasing a host Si substrate of a silicon-on-insulator (SOI) wafer. The construction of the suspended Si/SiO 2 structures induces 40.5% tensile strain on the top Si membrane. The fabricated TFTs with strained Si channels are transferred onto plastics using a roll-based transfer technique, and they exhibit a mobility enhancement factor of 1.2-1.4 compared with an unstrained Si TFT.

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Integration of MOSFETs with SiGe dots as stressor material

Cited by 16 publications

References 36 publications

Heterostructures with self-organized quantum dots of Ge on Si for optoelectronic devices

Heterostructures with self-organized quantum dots of Ge on Si for optoelectronic devices

Substrate strain manipulation by nanostructure perimeter forces

Mobility enhancement of strained Si transistors by transfer printing on plastic substrates

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