Integration of SrBi2Ta2O9 thin films for high density ferroelectric random access memory

Wouters, Dirk J.; Maes, David; Goux, L.; Lisoni, J. G.; Paraschiv, Vasile; Johnson, J. A.; Schwitters, M.; Everaert, Jean‐Luc; Boullart, Werner; Schaekers, Marc; Willegems, Myriam; Meeren, H. Vander; Haspeslagh, L.; Artoni, C.; Caputa, C.; Casella, P.; Corallo, G.; Russo, G.; Zambrano, R.; Monchoix, H.; Vecchio, Giovanna Del; Autryve, L. Van

doi:10.1063/1.2337359

Cited by 28 publications

(17 citation statements)

References 61 publications

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“…As well-established ferroelectrics, Aurivillius phase materials, e.g. SrBi2Ta2O9 (m = 2) and Bi3.25La0.75Ti3O12 (m = 3) have been developed for commercial use in Fe-RAM (ferroelectric random access memory) devices (7,126,127).…”

Section: Discussionmentioning

confidence: 99%

Naturally Layered Aurivillius Phases: Flexible Scaffolds for the Design of Multiferroic Materials

Halpin¹,

Keeney²

2021

Mat & Dev

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The Aurivillius layer-structures, described by the general formula Bi2O2(Am-1BmO3m+1), are naturally 2-dimensionally nanostructured. They are very flexible frameworks for a wide variety of applications, given that different types of cations can beaccommodated both at the A- and B-sites. In this review article, we describe how the Aurivillius phases are a particularly attractive class of oxides for the design of prospective single phase multiferroic systems for multi-state data storage applications, as they offer the potential to include substantial amounts of magnetic cations within a strongly ferroelectric system. The ability to vary m yields differing numbers of symmetrically distinct B-site locations over which the magnetic cations can be distributed and generates driving forces for cation partitioning and magnetic ordering. We discuss how out-of-phase boundary and stacking fault defects can further influence local stoichiometry and the extent of cation partitioning in these intriguing material systems.

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Section: Discussionmentioning

confidence: 99%

Naturally Layered Aurivillius Phases: Flexible Scaffolds for the Design of Multiferroic Materials

Halpin¹,

Keeney²

2021

Mat & Dev

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“…Разработкой FRAM с использованием слоистых перовскитов SBT и SBTN занимались фирмы Symetrix, Matsushita, ROHM Semiconductor, а также консорциум IMEC, STMicroelectronics, Applied Materials. Несмотря на демонстрации успешной интеграции (например, [32,33]), одной из основных проблем использования слоистых перовскитов явилась более высокая, чем у PZT, температура кристаллизации. Другие слоистые перовскиты на основе титаната висмута-лантана (Bi 1-х La х ) 4 Ti 3 O 12 (BLT) разрабатывала компания Hynix, которая является держателем патентов в данном направлении и производила FRAM объемом до 16 Мб [34].…”

Section: материалы и конструкцииunclassified

Ferroelectric memory: state-of-the-art manufacturing and research

Абдуллаев

Милованов

Волков

et al. 2020

Rossijskij tehnologičeskij žurnal

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Semiconductor industry calls for emerging memory, demonstrating high speed (like SRAM or DRAM), nonvolatility (like Flash NAND), high endurance and density, good scalability, reduced energy consumption and reasonable cost. Ferroelectric memory FRAM has been considered as one of the emerging memory technologies for over 20 years. FRAM uses polarization switching that provides low power consumption, nonvolatility, high speed and endurance, robust data retention, and resistance to data corruption via electric, magnetic fields and radiation. Despite the advantages, market share held by FRAM manufacturers is insignificant due to scaling challenges. State-of-the-art FRAM manufacturing is studied in this paper. Ferroelectric capacitors and memory cells made by main commercial FRAM manufactures (Texas Instruments, Cypress Semiconductor, Fujitsu и Lapis Semiconductor) are explored. All memory cells are based on the lead zirconate titanate PZT capacitor with the thickness of about 70 nm and IrOx/Ir or Pt electrodes. The leading FRAM technology remains the 130 nm node CMOS process developed at Texas Instruments fabs. New approaches to further scaling and new devices based on ferroelectrics are reviewed, including binary ferroelectrics deposited by ALD techniques, piezoelectronic transistors, ferroelectric/2D-semiconductor transistor structures, and others. Whether FRAM technology will be able to resolve one of the main contradictions between a high-speed processor and a relatively slow nonvolatile memory depends on the success of the new technologies integration.

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“…3 [25]. Tungsten is very susceptible to oxidation; hence, it is covered by the TiNAl barrier layer [26]. It also serves as an adhesion layer for the subsequent iri dium layer, which prevents oxidation of titanium.…”

Section: Fram: Design and Technologymentioning

confidence: 99%

Ferroelectric memory

Воротилов¹,

Сигов²

2012

Phys. Solid State

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The current status of developments in the field of ferroelectric memory devices has been consid ered. The rapidly growing market of non volatile memory devices has been analyzed, and the current state of the art and prospects for the scaling of parameters of non volatile memory devices of different types have been considered. The basic constructive and technological solutions in the field of the design of ferroelectric mem ory devices, as well as the "roadmaps" of the development of this technology, have been discussed.

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Integration of SrBi2Ta2O9 thin films for high density ferroelectric random access memory

Cited by 28 publications

References 61 publications

Naturally Layered Aurivillius Phases: Flexible Scaffolds for the Design of Multiferroic Materials

Naturally Layered Aurivillius Phases: Flexible Scaffolds for the Design of Multiferroic Materials

Ferroelectric memory: state-of-the-art manufacturing and research

Ferroelectric memory

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