Intellectual property protection (IPP) using obfuscation in C, VHDL, and Verilog coding

Abstract

One of the big challenges in the design of embedded systems today is how to combine design reuse and intellectual property protection (IPP). Strong IP schemes such as hardware dongle or layout watermarking usually have a very limited design reuse for different FPGA/ASIC design platforms. Some techniques also do not fit well with protection of software in embedded microprocessors. Another approach to IPP that allows an easy design reuse and has low costs but a somehow reduced security is code "obfuscation." Obfuscation is a method to hide the design concept, or program algorithm included in the C or HDL source by using one or more transformations of the original code. Obfuscation methods include, for instance, renaming identifiers, removing comments or formatting of the code. More sophisticated obfuscation methods include data splitting or merging, and control flow changes. This paper shows strength and weakness of method obfuscating C, VHDL and Verilog code.

Design Time Optimization for Hardware Watermarking Protection of HDL Designs

“…To secure the HDL code describing the watermarked design that will be delivered to a customer, encryption or obfuscation tools [ 22 ] may be used after IPP@HDL application. Recently, a set of open source obfuscation tools has been developed, which allows very long, hard to read identifiers to be used [ 21 ]. Comment methods that allow adding copyright and limited warranty information are also implemented.…”

“…The embedding of a watermark at this design level is highly tamper-resistant, since the signature is embedded in preliminary stages and is therefore dragged through the whole design flow. To prevent reverse engineering on the distribution of the protected high-level design, encryption and obfuscation techniques can be applied [ 21 , 22 ]. Obfuscation techniques consist in hiding the design concept or program algorithm included in the source by using one or more transformations of the original code.…”

Hardware IP Protection through Gate-Level Obfuscation

“…Classical Collbergs approaches were implemented for VHDL and Verilog in [15]. Almost all of them are not survived synthesis.…”

Obfuscation and watermarking of FPGA designs based on constant value generators

“…There were only a few studies thereafter on the application of these obfuscation transformations for HDLs. Classical Collberg's approaches were implemented for VHDL and Verilog in [3]. Almost all of them have no effect on the synthesized circuit.…”