Interface-controlled self-align source/drain Ge pMOSFETs using thermally-oxidized GeO&lt;inf&gt;2&lt;/inf&gt; interfacial layers

Nakakita, Yosuke; Nakane, Ryosho; Sasada, Tomohei; Matsubara, Hideaki; Takenaka, Mitsuru; Takagi, Shinichi

doi:10.1109/iedm.2008.4796838

Cited by 32 publications

(30 citation statements)

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“…Among a variety of ILs, GeO 2 can be the most promising and fundamental IL material for Ge, because the superior MOS interfaces have already been demonstrated on high-k/GeO 2 /Ge gate stacks with D it as low as 10 11 cm À2 eV À1 magnitude. [10][11][12][13] On the other hand, the GeO 2 IL has relatively low permittivity (5)(6). Thus, it is extremely difficult to scale down the EOT, unless an ultra-thin GeO 2 IL is used.…”

mentioning

confidence: 99%

Suppression of ALD-Induced Degradation of Ge MOS Interface Properties by Low Power Plasma Nitridation of GeO2

Zhang

Iwasaki

Taoka

et al. 2011

J. Electrochem. Soc.

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A high quality interfacial layer (IL) is important to realize advanced high-k/Ge gate stacks for Ge metal oxide semiconductor (MOS) devices. Here, GeO 2 can be regarded as one of the most promising interfacial layers (ILs). However, significant degradation of ultra thin GeO 2 IL after atomic layer deposition (ALD) of high-k films has been reported, making it difficult to integrate GeO 2 with high-k gate dielectrics. In this study, an in-situ plasma nitridation method is employed for plasma oxidized GeO 2 layers in order to realize GeO 2 -based ILs robust against ALD processes, resulting in a GeON layer with tunable nitrogen concentration. The impact of the nitrogen content on the properties of GeON IL is examined. It is found that the GeON IL with low nitrogen content exhibits good MOS interface properties, inherent to the GeO 2 /Ge interface, as well as its tolerance for ALD-induced damages.

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mentioning

confidence: 99%

Suppression of ALD-Induced Degradation of Ge MOS Interface Properties by Low Power Plasma Nitridation of GeO2

Zhang

Iwasaki

Taoka

et al. 2011

J. Electrochem. Soc.

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“…On the other hand, the HfO 2 (2.2 nm)/Al 2 O 3 (0.2 nm)/GeO x /Ge Ge p-and n-MOSFETs exhibit significantly enhanced mobility, attributed to sufficient passivation of Ge MOS interfaces by the GeO x ILs. A hole mobility much higher than the Si universal one and even higher than that in the thick thermal oxidation GeO 2 /Ge p-MOSFETs is obtained for the HfO 2 /Al 2 O 3 /GeO x /Ge p-MOSFET [16,23]. The electron mobility in the HfO 2 /Al 2 O 3 /GeO x /Ge n-MOSFET is comparable to the Si universal electron mobility and approaching the ~20-nm-thick thermal oxidation GeO 2 /Ge n-MOSFET [18,21].…”

Section: Ge Mos Mobility Improvementmentioning

confidence: 81%

Limiting Factors of Channel Mobility in III-V/Ge MOSFETs

et al. 2013

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MOSFETs using III-V/Ge channels have been regarded as strongly important for obtaining high current drive and low supply voltage CMOS under sub 10 nm regime. However, fundamental device physics on electrical properties of III-V/Ge MOSFETs such as mobility has not been fully clarified yet. In this paper, we address key issues for enhancing channel mobility in InGaAs/Ge MOSFETs. We have confirmed in Ge p-MOSFETs with ultrathin GeOx interfacial layers formed by plasma post oxidation that the GeOx thickness can control the peak mobility in a low Ns region. This fact is attributed to lower Dit near Ev, estimated from the S factor, in thicker GeOx. The relation between the peak mobility and the interface formation technologies is addressed. As for InGaAs nMOSFETs, we point out that the trapping of free electrons into interface states or slow states within the conduction band also significantly lowers electron mobility in InGaAs MOSFETs. As another critical factor for the electron mobility reduction, the influence of the body thickness on channel mobility is introduced. The thickness fluctuation scattering can be worse for III-V MOSFETs with lower effective mass and wider inversion-layer thickness. Thus, we have proposed MOS interface buffer channel structure, where InGaAs buffer layers sandwich InGaAs channels with higher In content. Actually, we have observed the significant mobility enhancement in the In0 .3Ga0 .7As/In0 .7Ga0 .3As/ In0 .3Ga0 .7As-OI structure over single In0 .7Ga0 .3As-OI structures.

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“…e has been attracting a lot of interest as an alternative channel material for future CMOS technologies, especially for the pMOSFET applications due to its much higher hole mobility than that in Si [1][2][3]. Recently, high mobility Ge pMOSFETs have been demonstrated with superior electrical properties through the metal-oxide-semiconductor (MOS) interface passivation using either the Si capping layer or the GeO2 interfacial layer [4][5][6][7][8][9][10]. These progresses suggest that Ge pMOSFETs are sufficiently mature and reproducible to warrant research into their reliability [11][12][13].…”

Section: Introductionmentioning

confidence: 99%

Impact of Channel Thickness on the NBTI Behaviors in the Ge-OI pMOSFETs With Al₂O₃/GeO_x Gate Stacks

Sun

Schwarzenbach

Yuan

et al. 2023

IEEE J. Electron Devices Soc.

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The impact of channel thickness on the negative-bias temperature instability (NBTI) behaviors has been studied for the Germanium-on-Insulator (Ge-OI) pMOSFETs. It is found that the permanent and recoverable defects are generated simultaneously during the NBTI stress of Ge-OI pMOSFETs. The lower NBTI is confirmed for the Ge-OI pMOSFETs with a thinner channel, due to the reduction of the band bending of Ev under a fixed electrical field of NBTI stress. Thus, the channel thickness scaling could be an effective method to improve the NBTI reliability for Ge-OI pMOSFETs.

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Interface-controlled self-align source/drain Ge pMOSFETs using thermally-oxidized GeO<inf>2</inf> interfacial layers

Cited by 32 publications

References 1 publication

Suppression of ALD-Induced Degradation of Ge MOS Interface Properties by Low Power Plasma Nitridation of GeO2

Suppression of ALD-Induced Degradation of Ge MOS Interface Properties by Low Power Plasma Nitridation of GeO2

Limiting Factors of Channel Mobility in III-V/Ge MOSFETs

Impact of Channel Thickness on the NBTI Behaviors in the Ge-OI pMOSFETs With Al₂O₃/GeO_x Gate Stacks

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Interface-controlled self-align source/drain Ge pMOSFETs using thermally-oxidized GeO<inf>2</inf> interfacial layers

Cited by 32 publications

References 1 publication

Suppression of ALD-Induced Degradation of Ge MOS Interface Properties by Low Power Plasma Nitridation of GeO2

Suppression of ALD-Induced Degradation of Ge MOS Interface Properties by Low Power Plasma Nitridation of GeO2

Limiting Factors of Channel Mobility in III-V/Ge MOSFETs

Impact of Channel Thickness on the NBTI Behaviors in the Ge-OI pMOSFETs With Al2O3/GeOx Gate Stacks

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Impact of Channel Thickness on the NBTI Behaviors in the Ge-OI pMOSFETs With Al₂O₃/GeO_x Gate Stacks