We studied the interface state generation and electron trapping by hot electrons under gate-induced drain leakage (GIDL) stress in p-type metal oxide semiconductor field-effect transistors (P-MOSFETs), which are used as the high-voltage core circuit of flash memory devices. When negative voltage was applied to a drain in the off-state, a GIDL current was generated, but when high voltage was applied to the drain, electrons had a high energy. The hot electrons produced the interface state and electron trapping. As a result, the threshold voltage shifted and the off-state leakage current (trap-assisted drain junction leakage current) increased. On the other hand, electron trapping mitigated the energy band bending near the drain and thus suppressed the GIDL current generation.