2011
DOI: 10.1109/tpds.2010.89
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Interlacing Bypass Rings to Torus Networks for More Efficient Networks

Abstract: We introduce a new technique for generating more efficient networks by systematically interlacing bypass rings to torus networks (iBT networks). The resulting network can improve the original torus network by reducing the network diameter, node-to-node distances, and by increasing the bisection width without increasing wiring and other engineering complexity. We present and analyze the statement that a 3D iBT network proposed by our technique outperforms 4D torus networks of the same node degree. We found that… Show more

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Cited by 29 publications
(11 citation statements)
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“…The performance results showed that the maximum speedup can be up to 52 for the present problem size and then the speedup curve greatly reduces along with the increase of processor cores. This drop reaffirmed that the performance of a communication system is an important factor for a more efficient parallel computer [63] that can offer better scalability to applications [64].…”
Section: Simulation Performancementioning
confidence: 81%
“…The performance results showed that the maximum speedup can be up to 52 for the present problem size and then the speedup curve greatly reduces along with the increase of processor cores. This drop reaffirmed that the performance of a communication system is an important factor for a more efficient parallel computer [63] that can offer better scalability to applications [64].…”
Section: Simulation Performancementioning
confidence: 81%
“…The results obviously demonstrate that MTS-L is effective at reducing the computation but it poses higher demands on communication than STS does. The performance analysis clearly indicated that a powerful communication system is quite important for improving the performance of multiscale modeling using MTS [12, 62]. …”
Section: Resultsmentioning
confidence: 99%
“…Interconnection networks are developed to support much larger number of processors at the expense of increased engineering complexities and programming difficulties [14-17]. Accelerators are used for boosting floating-point performance, though it further escalates the difficulty of programming that can fully utilize the novel accelerator or co-processor design [18-21].…”
Section: Three Top Supercomputersmentioning
confidence: 99%