Interlevel Dielectric Processes Using PECVD Silicon Nitride, Polyimide, and Polybenzoxazole for GaAs HBT Technology

Abstract

Multiple factors need to be considered when selecting an interlevel dielectric material for GaAs semiconductor device fabrication including what the electrical, mechanical, chemical, thermal, and cost requirements are and whether the material and the process are compatible with GaAs processing. In this study, we evaluated several interlevel dielectric materials for GaAs heterojunction bipolar transistor ͑HBT͒ technology. This technology requires the material to have good gapfill and planarizing characteristics, as the various device and interconnect structures can have significant topography. Additionally, the process typically can only have a maximum temperature of Ͻ300°C, as device degradation can occur at higher temperatures. The dielectric materials evaluated are plasma-enhanced chemical vapor deposition ͑PECVD͒, silicon nitride ͑Si 3 N 4 ͒, polyimide, and photodefinable polybenzoxazole ͑PBO͒. The PECVD Si 3 N 4 is mostly conformal when deposited. However, it has a high dielectric constant, cannot be used as gapfill material, and does not planarize the underlying topography, which makes multilevel metallization challenging. Polyimide and PBO, both of which need to be thermally cured, have a lower dielectric constant than PECVD Si 3 N 4 . However, the polyimide in this study has to be dry-etched, unlike the photosensitive PBO. Furthermore, the PBO has better gapfill and planarization capabilities than polyimide.Dielectrics are widely used for various applications in semiconductor device fabrication in the processing of both silicon and compound semiconductors, such as GaAs. They include applications, such as surface passivation, premetal dielectric, capacitor dielectric, interlevel dielectric, antireflective coating, final passivation, redistribution layer, and as a stress buffer layer and an encapsulant in packaging. [1][2][3][4][5][6][7][8][9][10][11][12] There are several types of dielectrics that are typically used for interlevel dielectrics. The most widely used are spin-on and plasma-enhanced chemical vapor deposition ͑PECVD͒ dielectrics. The spin-on dielectrics include both organic and inorganic films, such as benzocyclobutene ͑BCB͒, spin-on glass, polyimide, polybenzoxazole ͑PBO͒, and many others. 1,6,7,13-15 The most commonly used PECVD films include undoped and doped silicon dioxide ͑SiO 2 ͒, silicon oxynitride ͑SiON͒, and silicon nitride ͑Si 3 N 4 ͒. 11,12,[16][17][18][19][20][21][22][23] In GaAs technology, there are many factors that need to be taken into consideration when selecting an interlevel dielectric material, and depending on the material selected, the process flow is different. One of the most important considerations is the temperature and thermal budget constraint of the technology for which the interlevel material is to be used. For instance, while the maximum processing temperature for the backend-of-line for Si technology typically is 400°C, the maximum temperature for most GaAs technologies is 300°C or less. At temperatures higher than 300°C, significant GaAs device degradation occ...

In-situ spectroscopic ellipsometry and structural study of HfO2 thin films deposited by radio frequency magnetron sputtering

“…[1][2][3][4][5] Accordingly, to solve the leakage current problem, films of new materials of physically larger thickness with higher dielectric constant are required to replace such thin SiO 2 films as the gate dielectric. Since silicon nitride (j ¼ 7) 6 and silicon oxynitride (in the range between j ¼ 4 and j ¼ 7) 7 have slightly higher dielectric j than that of silicon dioxide (j ¼ 3.9) 3 and are also compatible with the well established silicon technology, they were studied initially 8 but are less preferred now as gate dielectric, for having too low dielectric constant as compared with high-j metal oxides.…”

Adhesion Evaluation of an Embedded SiN/GaAs Interface Using a Novel “Push-Out” Technique

“…An archetypical structure is a Au film patterned on a SiN passivated GaAs substrate [ 18 , 22 ]. Failure in the embedded SiN/GaAs interface can result in the loss of gate control in capacitors and moisture-incursion-induced substrate degradation [ 23 , 24 ], impairing the performance and service life of devices. Thus, adhesion evaluations of these ceramic/semiconductor interfaces are of primary importance for improving the performance and reliability of the devices.…”

Integration of Photodefinable Polybenzoxazole as Intermetal Dielectric for GaAs HBT Technology

“…In both cases, the overlying Metal 2 has sidewall cracks on the via sidewall, due to the poor metal step coverage. These metal cracks will lead to high via resistance, and will result in device performance degradation and reliability failures [27,33]. Many of the existing polyimide and other polymer dielectric materials have to be cured at high temperature and therefore are not compatible with GaAs technology.…”

“…Furthermore, if a polymer dielectric is considered for use as intermetal dielectric in GaAs technology, it has to be compatible with the interconnection patterning and metallization methods that are used in the technology. The metallization techniques typically used in GaAs technology may include e-beam evaporation, sputtering, and electroplating, while the patterning and removal methods may include wet or dry etch, and photoresist, dielectric, and metal liftoff [22][23][24][25][26][27][28]. Depending on the processes used, different photoresist, dielectric, and metal profiles may be obtained, which will result in different electrical and mechanical characteristics of the film and the devices fabricated.…”