Interlevel Dielectrics for Reduced Thermal Processing

Becker, Frank

doi:10.1007/978-1-4613-0541-5_10

Cited by 3 publications

(4 citation statements)

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“…The problem of As loss due to evaparation during a heattreatment has been a matter of concern in the literature (5,12,53) but could not be detected by SIMS for AsSG (1) or (2).…”

Section: Assmentioning

confidence: 99%

“…Silicon on insulator structures can be obtained by oxidizing buried layers of porous silicon, which can be selectively formed under silicon islands of low doping level because of the strong doping dependence of the anodization reaction of silicon. MOS devices have been developed using such structures, which have shown very good electrical characteristics and demonstrated that porous silicon is a very promising material for use in SOI technology (2,3). Although an increasing amount of work is now being devoted to this material, the mechanisms responsible for its formation still remain unclear.…”

Section: Introductionmentioning

confidence: 99%

“…In the first part of this study (1) the deposition process of boron and phosphorus doped SiO2 by pyrolytic decomposition of TEOS had been described. These films can find their application, e.g., as trench fill materials or as interlayer dielectrics, because the dopants cause a softening of the glass during a high temperature flow step, resulting in the smooth topography desired below the first metallization level of integrated circuits (2,3).…”

mentioning

confidence: 99%

“…The second part of our work presented here is dedicated to arsenosilicate glass (AsSG). Such films have been employed as dielectrics in integrated circuits as well (4), but the dopant level required to cause a glass flow is comparatively high (2,5) and there is no clear advantage over the established borophosphosilicate glass (BPSG) (2). Consequently, the main interest in AsSG has always centered on its ability to act as a diffusion source for silicon .…”

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confidence: 99%

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Low Pressure Deposition of Doped SiO2 by Pyrolysis of Tetraethylorthosilicate (TEOS): II . Arsenic Doped Films

Becker

Treichel

Rohl

1989

J. Electrochem. Soc.

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3033comes 100% when the detection tolerance (hp) is greater than 0.05 ~m, which corresponds to the value of the mark edge roughness. The detection repeatability of 0.02 ~tm can be obtained by averaging a number of detected registration signals. However, the overlay accuracy between optically printed patterns and the FIB exposed level is 0.11-0.13 ~m. It is thought that beam scan calibration, beam drift, or other errors of both the FIB and optical lithography systems restrict the overlay accuracy of this hybrid process. AcknowledgmentsThe authors are grateful to K. Shibayama of the LSI R&D Laboratory, and K. Fujikawa of the Optelectronic and Microwave Devices R&D Laboratory, Mitsubishi Electric Corporation, for continuous support and discussions. M. Ohtsubo, O. Ishihara, K. Nishitani, and K. Nagahama are also acknowledged for device design and processing. ABSTRACTArsenosilicate glass (AsSG) with dopant levels up to 15% was prepared using TEOS and triethoxiarsine (TEOA) or triethylarsenate (TEAs). The optimum deposition parameters and film properties like step coverage, uniformity, and particle densities correspond to the results obtained for undoped TEOS-SiO2. The different dissociation kinetics influence the way in which the arsenic is incorporated into the glass. Films prepared with TEAs are better diffusion sources because they do not tend to produce arsenic pile-up at the silicon surface. By heat-treating AsSG films with 6% As for 30-60 rain at 1000~ surface concentrations of >10 TM At cm -3 with junction depths below 200 nm are obtained on planar substrates. Slightly lower As concentrations are measured in trenches, an effect correlating with the different crystal orientations. Gate oxides grown on As diffused or undoped substrates show the same electrical qualities. By incorporating the AsSG trench doping into a complete process sequence, trench cell capacitors were produced and evaluated. The AsSG doping principle was found to be a safe and production-oriented process.) unless CC License in place (see abstract). ecsdl.org/site/terms_use address. Redistribution subject to ECS terms of use (see 128.255.6.125 Downloaded on 2015-06-05 to IP

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“…The problem of As loss due to evaparation during a heattreatment has been a matter of concern in the literature (5,12,53) but could not be detected by SIMS for AsSG (1) or (2).…”

Section: Assmentioning

confidence: 99%

Section: Introductionmentioning

confidence: 99%

mentioning

confidence: 99%

mentioning

confidence: 99%

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Low Pressure Deposition of Doped SiO2 by Pyrolysis of Tetraethylorthosilicate (TEOS): II . Arsenic Doped Films

Becker

Treichel

Rohl

1989

J. Electrochem. Soc.

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Low Temperature Silicon Dioxide Deposition and Characterization

et al. 2006

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Although much effort has been expended toward developing alternate dielectrics for use in fabricating ULSI circuits, there is still a need for high quality SiO2 films. In particular, process temperature restrictions have increased the demand for high quality, low temperature SiO2 films.[1] Such films have multiple applications in microelectronics, including use as passivation coatings, interlevel dielectrics, gate dielectrics in metal oxide semiconductor field effect transistors (MOSFETs), thin film transistors, and in devices using dual spacers.[2] Advanced devices at the 65-nm node and beyond are typically fabricated with nickel silicided electrodes—which enable lower junction silicon consumption, lower sheet resistance, and reduced agglomeration, but require subsequent process temperatures to be below 550°C. Also, to prevent movement of the ultra shallow junctions (USJs) during a subsequent thermal cycle, the temperatures for process steps after USJ formation must be kept below 600°C. To meet these needs, we have developed a low temperature (<500°C) SiO2 process that results in excellent dielectric quality.This paper presents results on high-quality chemical vapor deposition (CVD) SiO2 films deposited at temperatures from 200°C to 450°C using a novel proprietary and versatile silicon precursor using oxygen as the oxidizer. Composition, film stress, deposition rate, leakage current density, and step coverage results are presented.

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Development of a Cluster Tool and Analysis of Deposition of Silicon Oxide by TEOSO₂ PECVD

Morimoto

Swart

1996

MRS Proc.

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A single wafer cluster tool was developed. It is composed of a central robot arm wafer handler and three processing chambers: a RF PECVD chamber, a microwave after glow RPECVD chamber and a rapid thermal annealing chamber. The tool is designed to allow high flexibility, with in-situ multi-sequential processing capability. An in depth study of the deposition of silicon oxide by PECVD was performed. As unique features, it handles TEOS vapor without a carrier gas and it includes a double stage gas distribution system. The films were characterized by means of: ellipsometry, FTIRS, RBS, AES, SIMS, stress and etch rate in diluted (1:100) HF solution. Good uniformity (>98 %) was obtained. The results show that the quality of the films is most influenced by the wafer temperature and flux of oxygen. For the best condition, the following results were obtained: deposition rate of 370 nm/min., refraction index of 1.46, stoichiometry of 2.0, intrinsic stress of 1.3×109 dyn/cm2, carbon content below the AES and SIMS detection limit and low OH content. We also propose a model that fits our results.

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Interlevel Dielectrics for Reduced Thermal Processing

Cited by 3 publications

References 51 publications

Low Pressure Deposition of Doped SiO2 by Pyrolysis of Tetraethylorthosilicate (TEOS): II . Arsenic Doped Films

Low Pressure Deposition of Doped SiO2 by Pyrolysis of Tetraethylorthosilicate (TEOS): II . Arsenic Doped Films

Low Temperature Silicon Dioxide Deposition and Characterization

Development of a Cluster Tool and Analysis of Deposition of Silicon Oxide by TEOSO₂ PECVD

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Interlevel Dielectrics for Reduced Thermal Processing

Cited by 3 publications

References 51 publications

Low Pressure Deposition of Doped SiO2 by Pyrolysis of Tetraethylorthosilicate (TEOS): II . Arsenic Doped Films

Low Pressure Deposition of Doped SiO2 by Pyrolysis of Tetraethylorthosilicate (TEOS): II . Arsenic Doped Films

Low Temperature Silicon Dioxide Deposition and Characterization

Development of a Cluster Tool and Analysis of Deposition of Silicon Oxide by TEOSO2 PECVD

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Development of a Cluster Tool and Analysis of Deposition of Silicon Oxide by TEOSO₂ PECVD