Interrupt handler migration and direct interrupt scheduling for rapid scheduling of interrupt-driven tasks

Abstract

In this article, we propose two techniques that aim to minimize the scheduling latency of high-priority interrupt-driven tasks, named the Interrupt Handler Migration (IHM) and Direct Interrupt Scheduling (DIS). The IHM allows the interrupt handler to be migrated from the interrupt handler thread to the corresponding target process so that additional context switch can be avoided and the cache hit ratio with respect to the data generated by the interrupt handler can be improved. In addition, the DIS allows the shortest path reserved for urgent interrupt-process pairs to be laid between the interrupt arrival and target process by dividing a series of interrupt-driven operations into nondeferrable and deferrable operations. Both the IHM and DIS can be combined in a natural way and can operate concurrently. These techniques can be applied to all kinds of interrupt handlers with no modification to them. The proposed techniques not only reduce the scheduling latency, but also resolve the interrupt-driven priority inversion problem. We implemented a prototype in the Linux 2.6.19 kernel after adding real-time patches. Experimental results show that the scheduling latency is significantly reduced by up to 84.2% when both techniques are applied together. When the Linux OS runs on an ARM-based embedded CPU running at 200MHz, the scheduling latency can become as low as 30 μ s, which is much closer to the hardware-specific limitations. By lowering the scheduling latency, the limited CPU cycles can be consumed more for user-level processes and less for system-level tasks, such as interrupt handling and scheduling.

nuKernel

“…Although this mechanism improves the predictability, the execution of ISR remains non-preemptive and the interrupt latency of nested interrupts varies dramatically as shown in Table 1. Stodolsky [7] proposes the optimistic interrupt protection mechanism for interrupt masking. The mechanism uses a software interrupt mask instead of directly accessing the hardware interrupt mask to shorten the interrupt latency for nested interrupts.…”

Preemptibility-aware responsive multi-core scheduling

“…Each will be called NP section and P section, respectively. The OS latency is defined as the time elapsed between the arrival of an interrupt and the reactivation of a process that was waiting for the interrupt [2]. An urgent interrupt is defined as an interrupt that will wake up a real-time process.…”