2013
DOI: 10.1063/1.4798524
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Intrinsic bistability in quantum point contacts with in-plane side gates

Abstract: We study the onset of intrinsic bistability and accompanying hysteresis in a single quantum point contact (QPC) with in-plane side gates in the presence of lateral spin-orbit coupling. The hysteresis in the conductance versus common gate voltage applied to the two side gates exists only if the narrow portion of the QPC is long enough. The hysteresis is absent if the effects of electron-electron interaction are neglected but increases with the strength of the electron-electron interaction. The hysteresis appear… Show more

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Cited by 3 publications
(7 citation statements)
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“…Recently, we reported a theoretical investigation of the onset of hysteresis of asymmetrically biased GaAs QPC with in-plane side gates in the presence of lateral spin-orbit coupling (LSOC) [23]. We showed that the hysteresis in the conductance versus common gate bias applied to the two side gates exists only if the narrow portion of the QPC is long enough.…”
Section: Discussionmentioning
confidence: 99%
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“…Recently, we reported a theoretical investigation of the onset of hysteresis of asymmetrically biased GaAs QPC with in-plane side gates in the presence of lateral spin-orbit coupling (LSOC) [23]. We showed that the hysteresis in the conductance versus common gate bias applied to the two side gates exists only if the narrow portion of the QPC is long enough.…”
Section: Discussionmentioning
confidence: 99%
“…The hysteresis appears in the region of conductance anomalies, i.e., less than 2e 2 /h, and is due to multistable spin textures in these regions [23]. Hereafter, we used the NEGF approach to investigate the influence of dangling bond scattering on the conductance of a GaAs with in-plane side gates which has been shown to have a strong influence on the location of the conductance anomalies [26].…”
Section: Discussionmentioning
confidence: 99%
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“…These results are in agreement with NEGF simulations which show that the conductance plots versus common gate voltage applied to a QPC SGs reveal the presence of single or multiple hysteresis loops when varying the QPC dimensions and biasing conditions 57,58 . The following features were predicted by NEGF simulations: (a) hysteresis in the conductance plots is present only for sufficiently long QPCs and the e-e interaction in the channel must be strong enough; (b) The size of the hysteresis loops depends both on the polarity and magnitude of the asymmetric bias between the side gates, Δ V G , and also on the magnitude of the e-e interaction; (c) The hysteresis loops are sensitive to the presence of dangling bonds on the QPC sidewalls 59 . We also used NEGF simulations to illustrate how to fine tune the location of the 0.5 G 0 and the onset of hysteresis loops in four-gate QPCs when LSOC is present in the channel 60 .…”
Section: Introductionmentioning
confidence: 99%
“…We also used NEGF simulations to illustrate how to fine tune the location of the 0.5 G 0 and the onset of hysteresis loops in four-gate QPCs when LSOC is present in the channel 60 . The rich plethora and sensitivity of the hysteresis loops is a fingerprint of the wide variety of metastable spin textures accompanying the onset of a net spin polarization and the appearance of conductance anomalies in the QPC constriction 58,59 . The observation of hysteresis loops is yet another indirect evidence for the onset of spontaneous spin polarization in the QPC constriction.…”
Section: Introductionmentioning
confidence: 99%