Intrinsic reliability of RF power LDMOS FETs

Abstract

RF-LDMOS is the dominant RF power device technology in the cellular infrastructure market, having successfully displaced vertical MOSFETs and silicon bipolar transistors in the 1990s. A similar technology shift towards RF-LDMOS is occurring today in adjacent RF power markets such as UHF Broadcast, VHF Broadcast, L-Band and S-Band Radar, and the Industrial/Scientific/Medical markets (MRI, CO2 Laser, synchrotron, etc.). This increasing adoption of RF-LDMOS into these other RF power applications is the direct consequence of continuing progress at improving the intrinsic reliability and application-specific customization of LDMOS device structures.RF power applications, whether cellular infrastructure or the adjacent non-cellular markets, present unique and challenging thermal and electrical environments for the RF power transistor. While the design and architecture of the power amplifier is critically important in defining the stress environment, this presentation will focus on improvements of the intrinsic reliability of RF-LDMOS FETs. The most important of these intrinsic reliability characteristics are Hot Carrier Injection (HCI), Electromigration (EM), and device ruggedness. The stress environment presented to the RF power transistor will be described in detail, including the linkage between the RF stress and these intrinsic reliability metrics. Detailed models have been created to simulate these stresses, and the results of various device design strategies to mitigate these stresses will be presented.5A.2.8 IRPS11-442

Improving Linearity and Robustness of RF LDMOS by Mitigating Quasi-Saturation Effect

“…Referring to the HCI evaluation method of [14], device was stressed at the static biased condition; in this paper, V ds equals 28V and I dq equals 8mA/mm. Then on-resistance and drain current I dq were drawn versus time to evaluate the device lifetime.…”

LDMOS Technology for RF Power Amplifiers

“…Ruggedness in LDMOS can be correlated to the inherently present parasitic bipolar NPN transistor [12], [13]. Important transistor parameters for triggering are the base resistance and the drain-to-base capacitance .…”

“…The evolution of the performance is discussed, including the key improvement parameters and the reliability [12], [13]. In the second half of this paper, we give an overview of the performance of power LDMOS devices and the performance in several Doherty amplifiers over the various frequency bands.…”

Design Tradeoff of Hot Carrier Immunity and Robustness in LDMOS with Grounded Gate Shield

“…Research on HCI were forces on improving the silicon oxide interface quality and reducing the impact ionization near the interface [1]. Recently, LDMOS devices with various con gurations, i.e., drain extension, LOCOS, STI, SOI, super junction, oating eld plate, and body buried layer, have been comprehensively reviewed [2].…”