Introducing Preemptive Scheduling in Abstract RTOS Models using Result Oriented Modeling

Schirner,; Domer,

doi:10.1109/date.2008.4484673

Cited by 15 publications

(7 citation statements)

References 10 publications

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“…higher priority) tasks during this period. The same technique has been proposed in the ROM (Result Oriented Modelling) approach in [19].…”

Section: Software Execution Times and Multitaskingmentioning

confidence: 82%

“…The timing accuracy and therefore the simulation performance of this approach is limited by the fixed minimal resolution of discrete time advances. In [19] an extension, deploying techniques with respect to preemptive scheduling models, very similar to the ones presented in this work has been presented. The "Result Oriented Modelling" collects and consumes consecutive timing annotations while still handling preemptions accurately, similar to the "lazy synchronisation" scheme presented in [10].…”

Section: Introductionmentioning

confidence: 95%

See 1 more Smart Citation

Challenges of multi- and many-core architectures for electronic system-level design

Grüttner

Hartmann

Reinkemeier

et al. 2011

2011 International Conference on Embedded Computer Systems: Architectures, Modeling and Simulation

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In today's design of embedded systems the software part is increasingly important. Over the last years we have observed a shift from hardware to software added value. With the rise of multi-and many-core platforms even more complex software systems can be implemented. To efficiently map software applications to such architectures, the impact of platform decisions with respect to the hardware and the software infrastructure (OS, scheduling policies, priorities, mapping) has to be explored in early design phases.In this work, we discuss the challenges of the multi-and many-core design-space. We give an overview of our existing SystemC TM -based OSSS design flow including software multitasking in system-level models. We propose extensions towards multi-and many-core platform models and discuss which aspects of the system behaviour can be captured. Since this is work in progress we end up with challenges which have not been solved until now and propose new concepts to overcome the current limitations.

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“…higher priority) tasks during this period. The same technique has been proposed in the ROM (Result Oriented Modelling) approach in [19].…”

Section: Software Execution Times and Multitaskingmentioning

confidence: 82%

Section: Introductionmentioning

confidence: 95%

Challenges of multi- and many-core architectures for electronic system-level design

Grüttner

Hartmann

Reinkemeier

et al. 2011

2011 International Conference on Embedded Computer Systems: Architectures, Modeling and Simulation

View full text Add to dashboard Cite

show abstract

“…As a result, abstract OS models in SystemC have been proposed [Bacivarov et al 2002;Gerstlauer et al 2003;Moigne et al 2004;Schirner and Dömer 2008;Yoo et al 2002]. However, as far as we know, current OS modeling approaches are still struggling with the tradeoff between simulation speed and accuracy on handling preemptive scheduling.…”

Section: Homogeneous Hw/sw Co-simulationmentioning

confidence: 99%

“…Then, the delayed invocation of the OS model may not accurately capture the effect of preemption. For instance, Figure 2(c) shows the simulation diagram after adopting the function-level OS modeling approach [Schirner and Dömer 2008], in which the OS model is invoked at the end boundary of a function. The preemption handling is deferred until the end of foo() and produces a different task interleaving, αγ →β.…”

Section: Homogeneous Hw/sw Co-simulationmentioning

confidence: 99%

An Extended SystemC Framework for Efficient HW/SW Co-Simulation

Wang

et al. 2012

ACM Trans. Des. Autom. Electron. Syst.

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In this article, we propose an extended SystemC framework that directly enables software simulation in SystemC. Although SystemC has been widely adopted for system-level simulation of hardware designs nowadays, to complete HW/SW co-simulation, it still requires an additional instruction set simulator (ISS) for software execution. However, the heavy intercommunication overheads between the two heterogeneous simulators would significantly slow down simulation performance. To deal with this issue, our proposed approach automatically generates high-speed and equivalent SystemC models for target software applications that can be directly integrated with hardware models for complete HW/SW co-simulation. In addition, to properly handle multitasking, an efficient OS model is devised to support accurate preemptive scheduling. Since both the generated application model and the OS model are constructed in SystemC modules, our approach avoids heavy intercommunication overheads and achieves over 1,000 times faster simulation than that of the conventional ISS-SystemC approach. Experimental results demonstrate that our extended SystemC approach can perform at 50 to 220 MIPS while offering accurate simulation results.

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“…This is not the case for the Quantum Giver approach. Result-oriented modeling has also been successfully used to simulate preemptive scheduling in real-time operating systems [18].…”

Section: Related Workmentioning

confidence: 99%

Fast and accurate resource conflict simulation for performance analysis of multi-core systems

Stattelmann

Bringmann

2011

2011 Design, Automation &Amp; Test in Europe

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This work presents a SystemC-based simulation approach for fast performance analysis of parallel software components, using source code annotated with low-level timing properties. In contrast to other source-level approaches for performance analysis, timing attributes obtained from binary code can be annotated even if compiler optimizations are used without requiring changes in the compiler. To consider concurrent accesses to shared resources like caches accurately during a source-level simulation, an extension of the SystemC TLM-2.0 standard for reducing the necessary synchronization overhead is proposed as well. This enables the simulation of low-level timing effects without performing a full-fledged instruction set simulation and at speeds close to pure native execution.

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Introducing Preemptive Scheduling in Abstract RTOS Models using Result Oriented Modeling

Abstract: Abstract

Cited by 15 publications

References 10 publications

Challenges of multi- and many-core architectures for electronic system-level design

Challenges of multi- and many-core architectures for electronic system-level design

An Extended SystemC Framework for Efficient HW/SW Co-Simulation

Fast and accurate resource conflict simulation for performance analysis of multi-core systems

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