Inverse-narrow-width effects and small-geometry MOSFET threshold voltage model

Hsueh, Kan‐Lin; Sanchez, Jean-Louis; DeMassa, Thomas A.; Akers, L.A.

doi:10.1109/16.2459

Cited by 54 publications

(18 citation statements)

References 12 publications

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“…In the Berkeley Short-Channel IGFET Model (BSIM) [14], this effect is modeled using the narrow-width component of the threshold voltage model [13]. The observation that the threshold voltage of modern MOSFETs is much lower near the edges than the center of the channel is central to the method proposed in this paper.…”

Section: Introductionmentioning

confidence: 99%

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Exploiting STI stress for performance

Kahng

Sharma

Topaloglu

2007

2007 IEEE/ACM International Conference on Computer-Aided Design

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-Due to aggressive scaling of device feature size to improve circuit performance in the sub-wavelength lithography regime, both diffusion and poly gate shapes are no longer rectilinear. Diffusion rounding occurs most notably where the diffusion shapes are not perfectly rectangular, including common L and T-shaped diffusion layouts to connect to power rails. This paper investigates the impact of the non-rectilinear shape of diffusion (i.e., sloped diffusion or diffusion rounding) on circuit performance (delay and leakage). Simple weighting function models for I on and I off to account for the diffusion rounding effects are proposed, and compared with TCAD simulation. Our experiments show that diffusion rounding has an asymmetric characteristic for I off due to the differing significance of source/drain junctions on device threshold voltage. Therefore, we can model I on and I off as a function of slope angle and direction. The proposed models match well with TCAD simulation results, with less than 2% and 6% error in I on and I off , respectively.

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Section: Introductionmentioning

confidence: 99%

“…References [11], [12], [13] discuss edge effects, which are manifested as an unequal distribution of drive and leakage current densities across the width of the channel. In the Berkeley Short-Channel IGFET Model (BSIM) [14], this effect is modeled using the narrow-width component of the threshold voltage model [13].…”

Section: Introductionmentioning

confidence: 99%

Exploiting STI stress for performance

Kahng

Sharma

Topaloglu

2007

2007 IEEE/ACM International Conference on Computer-Aided Design

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“…The model we use is discussed in greater detail in [8][9][10][11]. For completeness, we review some of that discussion here.…”

Section: Edge Effect: Physical Explanationmentioning

confidence: 99%

“…References [8][9][10][11] discuss this effect, which manifests as an unequal distribution of drive and leakage current densities across the width of the channel. In the Berkeley Short-Channel IGFET Model (BSIM) [12], this effect is modeled using the narrow-width component of the threshold voltage model [10]. The observation that the threshold voltage of modern MOSFETs is much lower near the edges than the center of the channel is central to our method.…”

Section: Introductionmentioning

confidence: 99%

Shaping gate channels for improved devices

et al. 2008

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“…It is known that threshold voltage (V T h ) and the current characteristics are different along the channel, which is the so-called "edge effect"-a type of inverse narrow width effect [8,9,10,11,12]. There are several factors causing the device threshold voltage to be non-uniform along the channel width, such as fringing capacitance due to line-end extension [10], dopant scattering due to shallow trench isolation (STI) edges [10], and the well proximity effect Fig.…”

Section: Trapezoidal Approximation Modelmentioning

confidence: 99%

Trapezoidal approximation for on-current modeling of 45-nm non-rectilinear gate shape

Ryu

Kim

2013

IEICE Electron. Express

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Abstract:In this paper, a simple and accurate modeling technique that analyzes a non-rectilinear gate (NRG) transistor with a simplified trapezoidal approximation method is proposed. To approximate a non-rectangular channel shape into a trapezoidal shape, we extract three geometry-dependent parameters from post-lithographic patterns: the minimum channel length from the slices (L min ), maximum channel length from the slices (L max ), and effective channel width (W ef f ). We slice the NRG transistor gate along its width, sort these slices according to their sizes, and then use trapezoidal approximation. A physics-based technology computer aided design (TCAD) simulation is used to verify our model in a typical 45-nm process. The developed model requires fewer computations and less runtime as compared to the previous approaches. Therefore, a full chip post-lithography analysis (PLA) becomes feasible.

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Inverse-narrow-width effects and small-geometry MOSFET threshold voltage model

Cited by 54 publications

References 12 publications

Exploiting STI stress for performance

Exploiting STI stress for performance

Shaping gate channels for improved devices

Trapezoidal approximation for on-current modeling of 45-nm non-rectilinear gate shape

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