Inverter-Based Subthreshold Amplifier Techniques and Their Application in 0.3-V $\Delta\Sigma$ -Modulators

Abstract

Subthreshold amplifiers suffer from the limited voltage headroom which leaves little space for conventional analog techniques to enhance performance and efficiency. This paper presents an evolution process of implementing conventional structures with inverters, allowing ultralow-voltage operation with increased flexibility in adopting traditional circuit techniques. Based on the proposed inverter-based elementary structure and CMFB, both the Miller-compensated (MC) operational transconductance amplifier (OTA) and the feedforward-compensated (FFC) OTA achieve significantly improved performance as compared to previous works. The proposed amplifier techniques are verified in modulator (DSM) design, with MC-OTA for a DT-DSM and FFC-OTA for a CT-DSM, both fabricated in a 0.13-μm CMOS. The 0.3-V DT-DSM achieves 74.1-dB SNDR, 83.4-dB SFDR and 20-kHz bandwidth with 79.3-μW power, resulting in a Schreier figure of merit (FoM) of 158 dB. The 0.3-V CT-DSM achieves 68.5-dB SNDR, 82.6-dB SFDR, and 50-kHz bandwidth with 26.3-μW power, leading to a Schreier FoM of 161 dB. Both DSMs exhibit highly competitive performance among sub-0.5-V designs, validating the proposed subthreshold amplifier techniques.

A 3rd-order 1-bit Σ-Δ modulator with a 2-tap FIR filter embedded

“…In order to reduce the power consumption further, the output swings of the first integrator should be as small as possible. The reason is that the first integrator often consumes more than half of the total power consumption [16,17]. For single-bit modulator, inserting an FIR filter into the feedback loop is an effective way to reduce the output swings because the integration step could be attenuated [18,19,20].…”

Dynamic and Static Calibration of Ultra-Low-Voltage, Digital-Based Operational Transconductance Amplifiers

“…Focusing on the Operational Transconductance Amplifier (OTA), which is a key building block in most analog sub-systems, several new topologies and design techniques (Figure 1b-g) have been recently devised to enable efficient operation in nanoscale technologies and/or under Ultra-Low-Voltage (ULV) supply [7][8][9][10][11][12][13][14][15][16].…”

“…In [10] (Figure 1c), bulk-driven input devices are exploited to mitigate the CMIR limitation, at the cost of reduced efficiency due to the lower values of the bulk transconductance g mb compared to the gate transconductance g mg under the same bias. Inverter-based amplifiers [11,12] (Figure 1d-e) have been proposed to achieve a large equivalent transconductance (g m TOTAL = g m PMOS + g m NMOS ) under low V DD and voltage headroom. However, they suffer of limited intrinsic gain and common-mode rejection in nanometer-scale technologies.…”

“…However, they suffer of limited intrinsic gain and common-mode rejection in nanometer-scale technologies. Gate-driven [8,9], (c) Bulk-driven [10] (d,e) Inverter-based [11,12] (f) VCO-based [13,14] (g) Digital-based [16] topologies. ULV OTA state-of-art comparison plots:…”

High precision biomedical sensor readout circuits design for wearable health monitoring system

“…Also, a better common-mode feedback circuit will be employed to minimize the impact of possible bias drift which can contribute to the output distortion. Furthermore, the power consumption of the current design can be reduced by adopting lowvoltage low-power amplifiers such as the one proposed in [89] which has excellent power performance. Moreover, innovations on the phase quantizer, such as the low-power phase extended quantizer in [90] and double noise shaping quantizer in [91], will be conducted to further improve the FoMs and FoMw performances.…”