Investigation into the effect of the variation of gate dimensions on program characteristics in 3D NAND flash array

Seo, Joo Yun; Kim, Yoon; Park, Se Hwan; Kim, Wandong; Kim, Do-Bin; Lee, Jong-Ho; Shin, Hyungcheol; Park, Byung‐Gook

doi:10.1109/snw.2012.6243320

Cited by 5 publications

(1 citation statement)

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“…This innovation translates to enhanced storage capacity within a given area, addressing the ever-increasing demand for more data storage. Moreover, the use of GAA polysilicon channels offers improved gate controllability and superior management of electrical fluctuations [5][6][7][8]. These advancements in control mechanisms have paved the way for the successful commercialization of triple-level cell (TLC) and quadruple-level cell (QLC) technologies within the domain of 3D NAND.…”

Section: Introductionmentioning

confidence: 99%

Effect of Noncircular Channel on Distribution of Threshold Voltage in 3D NAND Flash Memory

Go,

Yoon,

Park

et al. 2023

Micromachines

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The instability in threshold voltage (VTH) and charge distributions in noncircular cells of three-dimensional (3D) NAND flash memory are investigated. Using TCAD simulation, we aim to identify the main factors influencing the VTH of noncircular cells. The key focus is on the nonuniform trapped electron density in the charge trapping layer (CTL) caused by the change in electric field between the circular region and the spike region. There are less-trapped electron (LT) regions within the CTL of programmed noncircular cells, which significantly enhances current flow. Remarkably, more than 50% of the total current flows through these LT regions when the spike size reaches 15 nm. We also performed a comprehensive analysis of the relationship between charge distribution and VTH in two-spike cells with different heights (HSpike) and angles between spikes (θ). The results of this study demonstrate the potential to improve the reliability of next-generation 3D NAND flash memory.

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Section: Introductionmentioning

confidence: 99%