2017
DOI: 10.1109/tmtt.2017.2666145
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Investigation of a Class-J Mode Power Amplifier in Presence of a Second-Harmonic Voltage at the Gate Node of the Transistor

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Cited by 38 publications
(15 citation statements)
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“…The small difference is mainly due to the following two reasons: First of all, the finite saturation resistance (R ds ) and non-linear shunt capacitance of the real device have some influence on the waveforms [18]. Secondly, since the complexity of the circuit is also significant, the neglect of the third harmonic and higher harmonics also causes the waveforms to change partly [19,20].…”
Section: Implementation and Measurementsmentioning
confidence: 99%
“…The small difference is mainly due to the following two reasons: First of all, the finite saturation resistance (R ds ) and non-linear shunt capacitance of the real device have some influence on the waveforms [18]. Secondly, since the complexity of the circuit is also significant, the neglect of the third harmonic and higher harmonics also causes the waveforms to change partly [19,20].…”
Section: Implementation and Measurementsmentioning
confidence: 99%
“…The purpose of phase linearizer is to ensure linearity specification is achieved across 700 to 800 MHz which encapsulates LTE Band 12,13,14,17,20,27,28,29,44,67,68 and 85 and 5G Band which is n28. As quantified in [53], an AM-PM distortion of 5 • or more results in gain compression degradation of 1 dB or more.…”
Section: Linearizer Circuit Designmentioning
confidence: 99%
“…The efficiency of the amplifier can be optimized through the waveform shaping of the voltage and current by minimizing the overlap between the two waveforms. This will reduce the power dissipation in the transistor [17]. Additional factor that causes efficiency degradation is the mismatch in the fundamental, 2 nd harmonic and 3 rd harmonic reactance due to highly volatile narrowband matching.…”
Section: Introductionmentioning
confidence: 99%
“…However, the staked FET must be used for implementation because of the CMOS PA's low breakdown voltage. The improvement in power output and D. E of a Class-J PA was presented in 23,24 by realizing a proper half-wave rectified sinusoidal waveform at the gate of the transistor. Apart from the usefulness of this method, it needs additional circuitry because of higher-order filters, which complicates the design and implementation of the PA. A methodology to improve the Class-J PA's performance by injecting the active power at the 2 nd harmonic frequency has been proposed in, 25 which causes an improvement in drain efficiency, but because of doubling and filtering, the design becomes complicated, and an increase in chip area makes it less appealing for integration.…”
Section: Introductionmentioning
confidence: 99%