Investigation of Empty Space in Nanoscale Double Gate (ESDG) MOSFET for High Speed Digital Circuit Applications

Kumari, Vandana; Saxena, Manoj; Gupta, R. S.; Gupta, Mridula

doi:10.5573/jsts.2013.13.2.127

“…Electron-phonon scattering results in electron transfer between subbands, with consequent power loss. 8,9 MOSFET devices are of great interest presently in mono atomic (such as Si) and compound semiconductor devices (various binary and ternary III-V materials for microwave or digital applications), [10][11][12][13][14][15][16][17][18][19][20][21] so one sees that the oxide layer is a very critical feature of the transister.…”

Section: Introductionmentioning

confidence: 99%

Evaluation of the differential capacitance for ferroelectric materials using either charge-based or energy-based expressions

Krowne

¹

2014

View full text Add to dashboard Cite

Differential capacitance is derived based upon energy, charge or current considerations, and determined when it may go negative or positive. These alternative views of differential capacitances are analyzed, and the relationships between them are shown. Because of recent interest in obtaining negative capacitance for reducing the subthreshold voltage swing in field effect type of devices, using ferroelectric materials characterized by permittivity, these concepts are now of paramount interest to the research community. For completeness, differential capacitance is related to the static capacitance, and conditions when the differential capacitance may go negative in relation to the static capacitance are shown.

show abstract

RF MOSFETs

Kumari,

Gupta,

Saxena

2024

Encyclopedia of RF and Microwave Engineering

0

View full text Add to dashboard Cite

In this article, the RF performance of different MOSFET architectures such as Silicon‐On‐Insulator (SOI), Lightly Doped Drain (LDD) MOSFET, Graphene FET, and Negative Capacitance (NC) FET have been reported based on the previously reported work in the form of equivalent circuits. Using the data reported in the literature, the cutoff frequency and maximum frequency of oscillation have been summarized with varying channel lengths. Compared results show that multigate architecture results in higher cutoff frequency and a maximum frequency of oscillation, which can be further increased by decreasing the channel length of the MOSFET architecture. However, the deterioration in the resulting device gain at lower channel length has also been reported. Furthermore, the performance of SOI, Silicon‐on‐Nothing (SON), Double Gate (DG), Double‐Gate Silicon‐On‐Insulator (DGSOI), and Empty Space in Double‐Gate (ESDG) architectures have been explored using ATLAS TCAD software tool for RF and digital parameters investigation. The various parameters explored in this article are current density, electric field, breakdown voltage, impact ionization rate, scattering parameters, noise conductance, minimum noise figure, and cross‐correlation factor. The presented results show that, for the same drain current value, ESDG architecture has higher device gain compared to other devices used for comparison along with higher cutoff frequency. However, this higher device gain comes at the cost of a slightly higher minimum noise figure but with improved noise conductance and cross‐correlation factor (slightly higher than DG). Thus, ESDG is a reliable candidate for LNA design compared to other devices.

show abstract

RF MOSFETs

Kumari,

Gupta,

Saxena

2024

Encyclopedia of RF and Microwave Engineering

0

View full text Add to dashboard Cite

In this article, the RF performance of different MOSFET architectures such as Silicon‐On‐Insulator (SOI), Lightly Doped Drain (LDD) MOSFET, Graphene FET, and Negative Capacitance (NC) FET have been reported based on the previously reported work in the form of equivalent circuits. Using the data reported in the literature, the cutoff frequency and maximum frequency of oscillation have been summarized with varying channel lengths. Compared results show that multigate architecture results in higher cutoff frequency and a maximum frequency of oscillation, which can be further increased by decreasing the channel length of the MOSFET architecture. However, the deterioration in the resulting device gain at lower channel length has also been reported. Furthermore, the performance of SOI, Silicon‐on‐Nothing (SON), Double Gate (DG), Double‐Gate Silicon‐On‐Insulator (DGSOI), and Empty Space in Double‐Gate (ESDG) architectures have been explored using ATLAS TCAD software tool for RF and digital parameters investigation. The various parameters explored in this article are current density, electric field, breakdown voltage, impact ionization rate, scattering parameters, noise conductance, minimum noise figure, and cross‐correlation factor. The presented results show that, for the same drain current value, ESDG architecture has higher device gain compared to other devices used for comparison along with higher cutoff frequency. However, this higher device gain comes at the cost of a slightly higher minimum noise figure but with improved noise conductance and cross‐correlation factor (slightly higher than DG). Thus, ESDG is a reliable candidate for LNA design compared to other devices.

show abstract

Investigation of Empty Space in Nanoscale Double Gate (ESDG) MOSFET for High Speed Digital Circuit Applications

Cited by 3 publications

References 20 publications

Evaluation of the differential capacitance for ferroelectric materials using either charge-based or energy-based expressions

Evaluation of the differential capacitance for ferroelectric materials using either charge-based or energy-based expressions

RF MOSFETs

RF MOSFETs

Contact Info

Product

Resources

About