2003
DOI: 10.1016/s0038-1101(03)00130-8
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Investigation of epitaxial lift-off the InGaAs p–i–n photodiodes to the AlAs/GaAs distributed Bragg reflectors

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Cited by 7 publications
(7 citation statements)
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“…There is a significant cost to implement these technologies, and it is not clear that these are scalable and cost-effective solutions to ultralarge-scale nano-optoelectronics. Techniques, such as wafer bonding [36]- [40], epitaxial liftoff [41], [42], and heteroepitaxy [43], [44], have been developed to augment the device performance and offer new capabilities in CMOS integration. However, underlying high cost, lack of substrate flexibility, interface defects, vacancies, and traps caused by material mismatch [45], [46] remain as big challenges.…”
Section: Traditional Heterogeneous Integrationmentioning
confidence: 99%
“…There is a significant cost to implement these technologies, and it is not clear that these are scalable and cost-effective solutions to ultralarge-scale nano-optoelectronics. Techniques, such as wafer bonding [36]- [40], epitaxial liftoff [41], [42], and heteroepitaxy [43], [44], have been developed to augment the device performance and offer new capabilities in CMOS integration. However, underlying high cost, lack of substrate flexibility, interface defects, vacancies, and traps caused by material mismatch [45], [46] remain as big challenges.…”
Section: Traditional Heterogeneous Integrationmentioning
confidence: 99%
“…In most cases, they also serve as the final carrier substrate for the fabricated devices, further increasing the weight and materials cost, and retaining the substrate's brittleness and rigidity [2]. There have been a few notable research demonstrations on heterogeneous integration of monocrystalline semiconductor materials for applications in integrated optoelectronics [3][4][5][6][7] and solar cells [8][9][10] using techniques such as epitaxial lift-off [11,12], wafer bonding [13][14][15] and heteroepitaxy [16][17][18][19][20][21][22][23]. These methods allow for some highperformance devices, but increase their cost-to-performance ratio (CPR) due to formidable technological challenges and limitations with these methods.…”
Section: Introductionmentioning
confidence: 99%
“…with different physical, electrical and optical characteristics on a single substrate. Some of the integration methods that have been demonstrated include wafer bonding [1][2], epitaxial liftoff [3][4][5], direct growth [6,7] and transfer printing [8][9][10]. Heterogeneous integration has been facilitated by the introduction of structures in the form of crystalline semiconductor micro/nano-wires/pillars/rods as the active materials.…”
Section: Introductionmentioning
confidence: 99%