In this paper, we propose taking into account the architectural features of the processor at the stage of constructing the numerical method itself. This idea is illustrated by the example of the synthesis of a new difference scheme for the heat conduction equation, which has traditionally been the object of testing innovations in the theory of difference schemes. The architectural feature hierarchical structure of the computer memory chosen led to considerable communication costs even when a single hardware computational flow was used for organising the calculations. This feature is accounted for in computational linear algebra by using block algorithms, and in the theory of difference schemes, by using the technique of programming ‘tiling’. However, for the two-layer difference schemes of block algorithms for solving grid equations, prior to the proposed work, it was not known because of the impossibility of organising block calculations by using the existing schemes. Here, we propose a new method of constructing two-layer difference schemes and a mixed scheme with a shift as an example of the application of this method. In the course of the experiments, a five-fold acceleration of calculations according to this scheme was demonstrated relative to the traditional explicit model, with the same computational complexity.