Investigation of HIL interfaces in nonlinear load studies

Abstract

We report on the power hardware in the loop (PHIL) interfaces with respect to a nonlinear load. The stability criteria can be affected by systems which contain highly nonlinear loads thus this paper looks into the behavior of such a system. For the power interface of the HIL, five different methods are used and the buck converter is considered as the nonlinear load which serves as the hardware under test (HUT). Two important characteristics of the PHIL are stability and accuracy which are tested on the system. In this paper four configurations are discussed for the buck converter as the HUT which results in different stability and accuracy of the output voltage. The output voltage errors of the five methods are compared in this paper. All of the analysis is done with Matlab/Simulink. Index Terms-Accuracy, buck converter, nonlinear load, power hardware in the loop (PHIL), power interface, stability.

Improving the stability of the battery emulator — Pulsed current load interface in a Power Hardware-in-the-Loop Simulation

“…9. For the case of an ideal voltage source in the hardware part, V hut n is given as: (9) In order to achieve stability, inequality (10) The simplest way to ensure that both (11) and (12) are fulfilled is to select:…”

“…The five interface algorithms shown in [3] are tested with simulations in [12] where the HUT is a buck converter. The simulated layout is similar to the one studied here with the difference that there is no capacitor connected in parallel to the input terminals of HUT.…”

Modelling of the Power Interface of the Digital-Physical Hybrid Simulation System of a VSC-HVDC Based on Virtual Resistance Compensation

“…As for the DIM-based methods proposed in [13][14][15] that intend to achieve real-time impedance matching by solving the equivalent impedance of the physical subsystem based on the measurements of the voltage and current at the port of the power interface unit interfacing with the physical subsystem, they are expected to be improved further to accommodate for an active system of which the equivalent impedance varies sharply and frequently, such as the VSC-HVDC. In general, the DIM solves the stability problem, but its implementation is more complicated.…”

Interface algorithm development for PHIL simulations of MMC‐HVDC devices via real‐time impedance matching

“…The characteristics of common interface algorithms are analysed in [8, 9], and the comparison results show that the stability of the ideal transformer model (ITM) interface algorithm is poor, the transmission line model (TLM) interface algorithm is complicated to realise, and the damping impedance method (DIM) has better simulation performance under the conditions of impedance real‐time matching, which is the main challenge of the DIM interface algorithm. One simple option is to calculate the average impedance from the root mean square (RMS) values of the decoupling the point current and voltage of the HUT [10–12], but this method is only suitable for passive systems, and the error is large. A small‐signal, white noise perturbation, is injected into the HUT, and then the cross‐correlation methods are used to construct a wideband estimation of the hardware impedance [13]; this method is difficult to realise the real‐time impedance matching, which limits its application.…”