Investigation of Single-Bit and Multiple-Bit Upsets in Oxide RRAM-Based 1T1R and Crossbar Memory Arrays

Li, Rui; Mahalanabis, D.; Barnaby, Hugh; Yu, Shimeng

doi:10.1109/tns.2015.2465164

Cited by 39 publications

(25 citation statements)

References 27 publications

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“…Several models have been proposed to explain retention losses [41]- [43]. The compared models in this work do not include the retention feature; however, an updated version of the Stanford model proposed in [44] includes a resistance retention failure mechanism modeled in Verilog-A.…”

Section: A Comparison Metricsmentioning

confidence: 99%

RRAM Device Models: A Comparative Analysis With Experimental Validation

Hajri¹,

Aziza²,

Mansour³

et al. 2019

IEEE Access

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Resistive Random Access Memories (RRAM) have recently shown outstanding characteristics such as high-scalability, high-speed, high-density, and low-energy operation. A simple and accurate model is crucial for rapid design and verification when using RRAM devices at the circuit level. The appropriate model selection gives insight into the behavior of RRAM as well as the efficient use of its unique properties. This work intends to guide the circuit designers in selecting the most appropriate RRAM model for their applications. We introduce a complete set of evaluation criteria for memristor models: type of model, type of switching, genericity, complexity, compatibility with actual physical switching mechanisms, linearity, symmetry, voltage/current control, hard set/soft reset, support electroforming, support for high programming signal frequencies, existence of a threshold, voltage level, timing dependence, temperature dependence and variability. This study compares the main existing RRAM models and summarizes the results in a table showing the main features and limitations of each model. Through extensive simulations and comparisons with experimental data, we provide an analysis and a validation of the reviewed models within the same simulation environment, ranging from individual elementary cells to large memory arrays. Furthermore, we provide a single and unique Verilog-A code integrating all the compared models.

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Section: A Comparison Metricsmentioning

confidence: 99%

RRAM Device Models: A Comparative Analysis With Experimental Validation

Hajri¹,

Aziza²,

Mansour³

et al. 2019

IEEE Access

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“…Hence, learning rules can be implemented by a series of discrete programming pulses that perform the weights update according to the update change defined by the algorithm. For instance, this can be obtained by means of duration/amplitude modulation of a voltage (or current) pulse applied on a physical device via the 1T1M (one transistor-one memristor) topology (see [16], [17]).…”

Section: Memristor-based Recurrent Neural Networkmentioning

confidence: 99%

Local Learning in Memristive Neural Networks for Pattern Reconstruction

Zoppo

Marrone

Corinto

2021

2021 IEEE International Symposium on Circuits and Systems (ISCAS)

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Resistive devices such as memristors have attracted the researchers' attention as fundamental computing elements. The prime objective of this work is to provide a simulated analogue computing platform based on memristor devices and recurrent neural networks that exploits the memristor device conductance programmability to implement local learning algorithms. We present the application of two simple two-phase learning procedures for Dynamic Neural Networks used to solve a pattern reconstruction task. The first learning scheme is related to Energy-based models and the second generalizes this method to generic vector field dynamics, relaxing the requirement of an energy function. Experimental results show that both the two approach significantly outperforms conventional learning rules used for pattern reconstruction.

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“…Thus, the learning rules can be implemented by a series of discrete programming pulses that perform the weights update according to the learning rules defined by the recurrent backpropagation and the equilibrium propagation algorithms. This can be obtained by means of amplitude/duration modulation of a voltage (or current) pulse applied on a physical device via the 1T-1R (one transistor-one memristor) architecture (see Liu et al, 2015;Merced-Grafals et al, 2016). An alternative approach is based on the use of emulator of generic memristors (Ascoli et al, 2016;Assaf et al, 2019) such that the dynamics in (2) can be obtained.…”

Section: Memristor-based Recurrent Neural Networkmentioning

confidence: 99%

Equilibrium Propagation for Memristor-Based Recurrent Neural Networks

2020

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Among the recent innovative technologies, memristor (memory-resistor) has attracted researchers attention as a fundamental computation element. It has been experimentally shown that memristive elements can emulate synaptic dynamics and are even capable of supporting spike timing dependent plasticity (STDP), an important adaptation rule that is gaining particular interest because of its simplicity and biological plausibility. The overall goal of this work is to provide a novel (theoretical) analog computing platform based on memristor devices and recurrent neural networks that exploits the memristor device physics to implement two variations of the backpropagation algorithm: recurrent backpropagation and equilibrium propagation. In the first learning technique, the use of memristor-based synaptic weights permits to propagate the error signals in the network by means of the nonlinear dynamics via an analog side network. This makes the processing non-digital and different from the current procedures. However, the necessity of a side analog network for the propagation of error derivatives makes this technique still highly biologically implausible. In order to solve this limitation, it is therefore proposed an alternative solution to the use of a side network by introducing a learning technique used for energy-based models: equilibrium propagation. Experimental results show that both approaches significantly outperform conventional architectures used for pattern reconstruction. Furthermore, due to the high suitability for VLSI implementation of the equilibrium propagation learning rule, additional results on the classification of the MNIST dataset are here reported.

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Investigation of Single-Bit and Multiple-Bit Upsets in Oxide RRAM-Based 1T1R and Crossbar Memory Arrays

Cited by 39 publications

References 27 publications

RRAM Device Models: A Comparative Analysis With Experimental Validation

RRAM Device Models: A Comparative Analysis With Experimental Validation

Local Learning in Memristive Neural Networks for Pattern Reconstruction

Equilibrium Propagation for Memristor-Based Recurrent Neural Networks

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