Investigation of the physical mechanisms governing data-retention in down to 10nm nano-trench Al<inf>2</inf>O<inf>3</inf>/CuTeGe conductive bridge RAM (CBRAM)

Abstract

In this work, we present an experimental and theoretical analysis of scaled (down to 10nm) Al 2 O 3 /CuTeGe based CBRAM. We focus on the understanding of the physical mechanisms responsible for the failure of high and low resistance states at high temperature. Using a numerical model combined with ab-initio calculations, we elucidate for the 1 st time at our knowledge the role of the filament morphology on the resistance instability. We demonstrate that an optimized filament shape (tuned by adjusting the operating conditions) significantly improves the memory window stability at high temperatures.

Superior Retention of Low-Resistance State in Conductive Bridge Random Access Memory With Single Filament Formation

“…Wei et al proposed a two-step forming method to improve the LRS retention, owing to the increased ions density in the filament [3]. Moreover, the retention characteristics can be significantly improved by tuning the filament morphology through adjusting the operating conditions [10], [11]. In other aspect, single filament and multi-filament were commonly observed in the literatures [11]- [13], depending on the programming schemes or the device structures.…”

Experimental and theoretical understanding of Forming, SET and RESET operations in Conductive Bridge RAM (CBRAM) for memory stack optimization

“…Nano-trench CBRAM devices ( Fig.1) are composed by a bottom electrode (BE) defined by a TiN, Ta or WSi metal ring (the electrode length -20nm to 5nm -being governed by the metal thickness [3]). A trench defined by e-beam lithography (down to 50nm) is then patterned in a SiN capping layer, allowing the reduction of the active top electrode length.…”

“…From the even rates the events probabilities are calculated and for each iteration time, an event is randomly picked and the global system is updated (position, electric field and probabilities). The cell current is calculated through a percolation model [3] following the local Cu occupation, and allowing to compute I(time) forming characteristics (Fig.5). The forming time is thus calculated when compliance current is reached (Fig.6) depending on the operating voltage.…”

“…To respond to the electrical needs of this unique cycle a complex circuitry may be required. Moreover, a good control of the RESET mechanisms, governing the window margin and thermal stability [3] is essential for CBRAM industrialization but still has to be clearly understood. In this paper, we present Nano-trench CBRAM combining various material stacks and offering good scaling capability (down to 5x50nm effective area).…”

Amorphous SiC resistive memory with embedded Cu nanoparticles

“…The resistance of the device in the LRS and HRS are often noted as RON and ROFF, respectively. Typical conductive filaments such as Cu filament have a size below 10nm, which indicates great scaling potential for RMs use Cu filament [2][3][4][5].…”