The miniaturization and application development are the expected challenges on the today engineering design research on bandpass (BP) type negative group delay (NGD) circuit. To overcome this technical limit, an innovative contribution on integrated circuit (IC) design method of BP-NGD application to design constant phase shifter (PS) in 130-nm BiCMOS technology is developed in the present paper. The BP-NGD PS microwave passive IC is topologically consisted of cascade of CLC-and RLC-resonant networks. After the S-matrix modelling, the synthesis design equations enabling to calculate each lumped component values constituting the BP-NGD PS BiCMOS are established. The design equations are expressed knowing the targeted specifications as phase shift and operating frequency. The BiCMOS design methodology including the key steps as design rule checking (DRC), layout versus schematic (LVS) and post-layout simulation (PLS) is described. The miniaturized BP-NGD PS design feasibility is verified with schematic and layout simulations with IC CMOS standard commercial software tool. A proof-of-concept (POC) of 130-nm BiCMOS BP-NGD PS operating at the center frequency f0=1.9 GHz and bandwidth ∆f=0.1 GHz is designed and simulated. After DRC, the chip layout of miniaturized BP-NGD PS POC presents 0.407 mm² size. The BP-NGD PS POC exhibits constant phase shift notable value of about φ0=-90°+/-0.4° under S21(f0)=-6+/-1 dB transmission coefficient with good flatness and reflection coefficients (S21(f0) and S21(f0)) widely better than -10 dB. The design robustness is confirmed by 1000-trial Monte Carlo uncertainty analyses with PLS results. Because of the potential integration in wireless sensor networks (WSNs), the BP-NGD PS under study is a promising candidate for the improvement of the future 5G and 6G transceiver design.