(Invited) Gate Insulator for High Mobility Oxide TFT

Park, Sang‐Hee Ko; Kim, Hee‐Ok; Cho, Sung-Heang; Ryu, Min Ki; Yang, Jong‐Heon; Ko, Jong-Beom; Hwang, Chi‐Sun

doi:10.1149/06410.0123ecst

Cited by 4 publications

(7 citation statements)

References 5 publications

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“…A further advantage of the solution-processed Hf-SAND used here is limiting a-IGZO damage by high-energy dielectric deposition techniques such as sputtering. 19,60,67 The confirmed viability of SAND in top-gate TFT structures also opens possibilities for further work on SAND-based device durability, such as long-term stability testing, an important step for deeper understanding of the properties of this unconventional hybrid dielectric.…”

Section: ■ Results and Discussionmentioning

confidence: 94%

“…43 Another impressive mobility of 39.9 cm 2 V −1 s −1 was reported for devices fabricated with a plasma-enhanced atomic layer deposited SiO 2 dielectric and sputtered IGZO. 60 Additional large literature mobilities are 35.6, 26, 22, and 21.20 cm 2 V −1 s −1 produced by top-gate topcontact (TG-TC) devices with 10 nm RF sputtered SiO 2 and a buried ITO layer in a-IGZO via RF sputtering, TG-BC devices with a sputtered SiO x /SiN x dielectric, TG-TC transistors utilizing a 250 nm spin-coated siloxane dielectric, and coplanar contact devices with a 150 nm SiO x dielectric, respectively. 54,59,66,69 All of the aforementioned devices used sputtered IGZO.…”

Section: ■ Results and Discussionmentioning

confidence: 99%

“…37,48,66 Numerous studies have reported improved environmental stability of top-gate a-IGZO TFTs using a variety of dielectric materials. 41,43,60,69 It is therefore expected that the top-gate SAND TFTs will have superior environmental stability compared to bottom-gate devices. A further advantage of the solution-processed Hf-SAND used here is limiting a-IGZO damage by high-energy dielectric deposition techniques such as sputtering.…”

Section: ■ Results and Discussionmentioning

confidence: 99%

“…(a) Mobility vs subthreshold slope (SS) of literature top-gate IGZO TFTs for various dielectric materials. ,,,− (b) Mobility vs SS for IGZO TFTs with solution-processed dielectrics. The circular symbols represent linear mobilities.…”

Section: Resultsmentioning

confidence: 99%

“…The well-known sensitivity of a-IGZO to atmospheric effects is known to contribute to device instability and is a major attraction of top-gate devices. ,, Numerous studies have reported improved environmental stability of top-gate a-IGZO TFTs using a variety of dielectric materials. ,,, It is therefore expected that the top-gate SAND TFTs will have superior environmental stability compared to bottom-gate devices. A further advantage of the solution-processed Hf-SAND used here is limiting a-IGZO damage by high-energy dielectric deposition techniques such as sputtering. ,, The confirmed viability of SAND in top-gate TFT structures also opens possibilities for further work on SAND-based device durability, such as long-term stability testing, an important step for deeper understanding of the properties of this unconventional hybrid dielectric.…”

Section: Resultsmentioning

confidence: 99%

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Self-Assembled Nanodielectrics for Solution-Processed Top-Gate Amorphous IGZO Thin-Film Transistors

Stallings

Smith

Chen

et al. 2021

ACS Appl. Mater. Interfaces

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Metal oxide semiconductors, such as amorphous indium gallium zinc oxide (a-IGZO), have made impressive strides as alternatives to amorphous silicon for electronics applications. However, to achieve the full potential of these semiconductors, compatible unconventional gate dielectric materials must also be developed. To this end, solution-processable self-assembled nanodielectrics (SANDs) composed of structurally well-defined and durable nanoscopic alternating organic (e.g., stilbazolium) and inorganic oxide (e.g., ZrO x and HfO x ) layers offer impressive capacitances and low processing temperatures (T ≤ 200 °C). While SANDs have been paired with diverse semiconductors and have yielded excellent device metrics, they have never been implemented in the most technologically relevant top-gate thin-film transistor (TFT) architecture. Here, we combine solution-processed a-IGZO with solution-processed four-layer Hf-SAND to fabricate top-gate TFTs, which exhibit impressive electron mobilities (μ SAT = 19.4 cm 2 V −1 s −1 ) and low threshold voltages (V th = 0.83 V), subthreshold slopes (SS = 293 mV/dec), and gate leakage currents (10 −10 A) as well as high bias stress stability.

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Section: ■ Results and Discussionmentioning

confidence: 94%

Section: ■ Results and Discussionmentioning

confidence: 99%

Section: ■ Results and Discussionmentioning

confidence: 99%

Section: Resultsmentioning

confidence: 99%

Section: Resultsmentioning

confidence: 99%

See 3 more Smart Citations

Self-Assembled Nanodielectrics for Solution-Processed Top-Gate Amorphous IGZO Thin-Film Transistors

Stallings

Smith

Chen

et al. 2021

ACS Appl. Mater. Interfaces

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Outstanding Performance as Cu Top Gate IGZO TFT With Large Trans‐Conductance Coefficient by Adopting Double‐Layered Al₂O₃/SiN_x Gate Insulator

Kim

Lee

Mun

et al. 2017

Physica Status Solidi (a)

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Gate insulator (GI) materials in top gate structured InGaZnO thin‐film transistor (TFT) with copper gate electrode are examined for the application to the large area display. To overcome the problems with hydrogen diffusion, which can influence the number of carriers in oxide semiconductor and to gain large trans‐conductance coefficient, a double‐layered GI of 30 nm Al2O3/120 nm SiNxis adopted. The TFT showed field‐effect mobility, Von, SS, and hysteresis of 12.8 cm2 V−1 s−1, −0.7 V, 0.17 V decade−1, and almost 0 V, respectively, and the ΔVon under the positive bias stress of 20 V and negative bias stress of −20 V at 60 C for 10 000 s are +0.1 and −0.4 V, respectively.

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Performance and Stability Enhancement of In–Sn–Zn–O TFTs Using SiO₂ Gate Dielectrics Grown by Low Temperature Atomic Layer Deposition

Sheng

Han

Choi

et al. 2017

ACS Appl. Mater. Interfaces

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Silicon dioxide (SiO) films were synthesized by plasma-enhanced atomic layer deposition (PEALD) using BTBAS [bis(tertiarybutylamino) silane] as the precursor and O plasma as the reactant, at a temperature range from 50 to 200 °C. While dielectric constant values larger than 3.7 are obtained at all deposition temperatures, the leakage current levels are drastically reduced to below 10 A at temperatures above 150 °C, which are similar to those obtained in thermally oxidized and PECVD grown SiO. Thin film transistors (TFTs) based on In-Sn-Zn-O (ITZO) semiconductors were fabricated using thermal SiO, PECVD SiO, and PEALD SiO grown at 150 °C as the gate dielectrics, and superior device performance and stability are observed in the last case. A linear field effect mobility of 68.5 cm/(V s) and a net threshold voltage shift (ΔV) of approximately 1.2 V under positive bias stress (PBS) are obtained using the PEALD SiO as the gate insulator. The relatively high concentration of hydrogen in the PEALD SiO is suggested to induce a high carrier density in the ITZO layer deposited onto it, which results in enhanced charge transport properties. Also, it is most likely that the hydrogen atoms have passivated the electron traps related to interstitial oxygen defects, thus resulting in improved stability under PBS. Although the PECVD SiO contains a hydrogen concentration similar to that of PEALD SiO, its relatively large surface roughness appears to induce scattering effects and the generation of electron traps, which result in inferior device performance and stability.

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(Invited) Gate Insulator for High Mobility Oxide TFT

Cited by 4 publications

References 5 publications

Self-Assembled Nanodielectrics for Solution-Processed Top-Gate Amorphous IGZO Thin-Film Transistors

Self-Assembled Nanodielectrics for Solution-Processed Top-Gate Amorphous IGZO Thin-Film Transistors

Outstanding Performance as Cu Top Gate IGZO TFT With Large Trans‐Conductance Coefficient by Adopting Double‐Layered Al₂O₃/SiN_x Gate Insulator

Performance and Stability Enhancement of In–Sn–Zn–O TFTs Using SiO₂ Gate Dielectrics Grown by Low Temperature Atomic Layer Deposition

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(Invited) Gate Insulator for High Mobility Oxide TFT

Cited by 4 publications

References 5 publications

Self-Assembled Nanodielectrics for Solution-Processed Top-Gate Amorphous IGZO Thin-Film Transistors

Self-Assembled Nanodielectrics for Solution-Processed Top-Gate Amorphous IGZO Thin-Film Transistors

Outstanding Performance as Cu Top Gate IGZO TFT With Large Trans‐Conductance Coefficient by Adopting Double‐Layered Al2O3/SiNx Gate Insulator

Performance and Stability Enhancement of In–Sn–Zn–O TFTs Using SiO2 Gate Dielectrics Grown by Low Temperature Atomic Layer Deposition

Contact Info

Product

Resources

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Outstanding Performance as Cu Top Gate IGZO TFT With Large Trans‐Conductance Coefficient by Adopting Double‐Layered Al₂O₃/SiN_x Gate Insulator

Performance and Stability Enhancement of In–Sn–Zn–O TFTs Using SiO₂ Gate Dielectrics Grown by Low Temperature Atomic Layer Deposition