Ion‐Implant Isolated Vertical GaN p‐n Diodes Fabricated with Epitaxial Lift‐Off From GaN Substrates

Abstract

Ion-implant isolated vertical GaN p-n junction diodes fabricated with epitaxial lift-off (ELO) from GaN substrates are demonstrated. For the ELO process, a band-gap selective photoelectrochemical (PEC) wet etch with a pseudomorphic InGaN release layer is utilized. Compared with devices isolated using mesa etching, the ion-implant isolated devices exhibit more ideal forward current-voltage characteristics and lower leakage currents. Devices are also compared with and without ELO processing. Devices measured after ELO processing and mounting to metallized carrier substrates show similar electrical performance to GaN-on-GaN control samples without ELO processing. No indication of material quality degradation is found on the ELO devices. The ELO devices exhibit turn-on voltages of 3.15 V (at a current density of 100 A cm À2 ), with specific on resistance (R on ) of 0.52 mΩ cm 2 at 4.8 V and breakdown voltage (V br ) approximately of 750 V.

High-Voltage Vertical GaN p-n Diodes by Epitaxial Liftoff From Bulk GaN Substrates

“…Furthermore, ELO can result in improved economics by enabling re-use of the original GaN substrates [14]. ELO processing has previously been demonstrated to improve the performance of GaN Schottky diodes grown on sapphire substrates [15], [16], and low-voltage mesa-isolated vertical ELO GaN p-n diodes have also been demonstrated [17], [18]. To improve device performance and scalability, a vertical p-n diode fabrication process with ion-implantation edge termination (ET) and sputtered SiN x passivation was demonstrated for GaN-on-GaN diodes, with performance approaching the fundamental material limits of GaN [4], [19].…”

“…To improve device performance and scalability, a vertical p-n diode fabrication process with ion-implantation edge termination (ET) and sputtered SiN x passivation was demonstrated for GaN-on-GaN diodes, with performance approaching the fundamental material limits of GaN [4], [19]. This process was previously used in conjunction with ELO to bond thin-film GaN p-n diodes to a metallized alumina carrier; this first demonstration resulted in V br = 800 V and R on = 0.5 m • cm 2 [21]. In this work, we report significantly improved breakdown performance for ELO diodes bonded to high-conductivity Cu carriers, as well as a study of the thermal resistance associated with the ELO process for GaNon-GaN vertical diodes.…”

“…both the ELO and control structures. P-GaN ohmic contacts with low resistance were obtained using a two-step surface treatment [17] and thermal annealing of evaporated Ni/Au (20/500 nm) contacts. A 0.5 μm thick Au top layer was used on the anode contacts to reduce probe resistance on large devices [25].…”

(Invited) Epitaxial Lift-Off of GaN and Related Materials for Device Applications

“…The epitaxial lift-off process has been demonstrated to improve the electrical and thermal performance of Schottky diodes on non-native substrates [5,6] and high-voltage, high-power pn junctions grown on low-dislocation-density bulk GaN substrates [7][8][9][10] without compromising material quality, while also resulting in ultra-thin devices with total thicknesses below 15 µm. Figure 3 shows a typical result for a GaN pn junction diode [7]; the forward and reverse currents of lifted-off and control devices (devices fabricated without an embedded InGaN release layer on their original GaN host substrates) are nearly indistinquisable, and in particular the ideality factor achieved is excellent, highlighting that the high quality of the material achieved in the epitaxial growth is preserved through the lift-off and transfer processing.…”