Integration
 2014
DOI: 10.1016/j.vlsi.2014.01.001
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ISGP: Iterative sequential geometric programming for precise and robust CMOS analog circuit sizing

Sudip Kundu
1
,
Pradip Mandal
2
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Cited by 8 publications
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References 29 publications
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An efficient method of Pareto-optimal front generation for analog circuits

Kundu
1
,
Mandal
2
2017
Analog Integr Circ Sig Process
1
0
0
0
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An efficient method of Pareto-optimal front generation for analog circuits

Kundu
1
,
Mandal
2
2017
Analog Integr Circ Sig Process
1
0
0
0
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Modeling and sizing of non-linear CMOS analog circuits used in mixed signal systems

Kundu
1
,
Sarkar
2
,
Mandal
3
et al. 2018
Analog Integr Circ Sig Process
3
0
1
0
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An evolutionary-based design methodology for performance enhancement of a folded-cascode OTA using symbiotic organisms search algorithm and gm/ID technique

Panda
1
,
Patnaik
2
,
Mal
3
et al. 2020
Analog Integr Circ Sig Process
2
0
0
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