Junctionless nanowire transistor fabricated with high mobility Ge channel

Yu, Ran; Georgiev, Yordan M.; Das, Samaresh; Hobbs, Richard G.; Povey, Ian M.; Petkov, Nikolay; Shayesteh, Maryam; O’Connell, Dan; Holmes, Justin D.; Duffy, Ray

doi:10.1002/pssr.201300119

Cited by 19 publications

(13 citation statements)

References 14 publications

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“…However, work must continue into applications of the MLD process on new device architectures such as junction-less transistors and gate-all-around transistors. [65,66] Aside from microelectronics, the MLD process has also been successfully applied with great success to solar cell materials and optoelectronic materials. Concurrently, there is a need for innovative improvements to metrological techniques to be made in order for the ultra-shallow junctions to be characterised to ensure conformality and abruptness.…”

Section: Discussionmentioning

confidence: 99%

Chemical approaches for doping nanodevice architectures

et al. 2016

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Access to the full text of the published version may require a subscription. after most spin-on-doping processes which are often difficult to remove. In-situ doping of nanostructures is especially common for bottom-up grown nanostructures but problems associated with concentration gradients and morphology changes are commonly experienced. Monolayer doping (MLD) has been shown to satisfy the requirements for extended defect-free, conformal and controllable doping on many materials ranging from traditional silicon and germanium devices to emerging replacement materials such as III-V compounds but challenges still remain, especially with regard to metrology and surface chemistry at such small feature sizes. This article summarises and critically assesses developments over the last number of years regarding the application of gas and solution phase techniques to dope silicon-, germanium-and III-V-based materials and nanostructures to obtain shallow diffusion depths coupled with high carrier concentrations and abrupt junctions. Rights3

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Section: Discussionmentioning

confidence: 99%

Chemical approaches for doping nanodevice architectures

et al. 2016

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“…Germanium-on-insulator (GOI) substrate has attracted much attention due to the combination of high mobility of Ge and on-insulator advantages, such as reduced junction capacitances and better electrostatic control. Ultra thin body GOI based JLTs (GOIJLTs) have also been demonstrated both in planar structure [5] and multi-gate structure [6]. Due to reducing impact of the imperfect interfaces between channel and gate oxide, JLT structure is much more promising for Ge due to the bulk conduction mechanism of JLTs.…”

Section: Introductionmentioning

confidence: 99%

Effect of channel doping profiles on performance of germanium-on-insulator based junctionless transistors

Sun

Liang

Liu

et al. 2015

2015 International Symposium on Next-Generation Electronics (ISNE)

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The effect of channel doping profiles on germanium-on-insulator based junctionless transistors was investigated using Sentaurus 3D device simulator. Simulation results show that using Gaussian-function doping profile, which can be simply realized using ion implantation process, can obtain larger I on /I off ratio and smaller subthreshold slope value compared with uniform doping profile. With the increase of aspect ratio (T/W) and decrease of gate length, the effect is greater. Smaller standard deviation of Gaussian-function doping profile can also induce better performance.

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“…2,3 Ge, however, is one of the most promising candidates that can complement or even replace Si in future nanoelectronics. [4][5][6] In general, Ge is the most Si-compatible high-mobility channel material. The electron and hole mobilities in Ge are about two and four times higher than that of Si, respectively.…”

Section: Introductionmentioning

confidence: 99%

Nanoscale n++-p junction formation in GeOI probed by tip-enhanced Raman spectroscopy and conductive atomic force microscopy

Prucnal

Berencén

Wang

et al. 2019

Journal of Applied Physics

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Ge-on-Si and Ge-on-insulator (GeOI) are the most promising materials for the next-generation nanoelectronics that can be fully integrated with silicon technology. To this day, the fabrication of Ge-based transistors with a n-type channel doping above 5 × 10 19 cm −3 remains challenging. Here, we report on n-type doping of Ge beyond the equilibrium solubility limit (n e ≈ 6 × 10 20 cm −3 ) together with a nanoscale technique to inspect the dopant distribution in n ++ -p junctions in GeOI. The n ++ layer in Ge is realized by P + ion implantation followed by millisecond-flashlamp annealing. The electron concentration is found to be three times higher than the equilibrium solid solubility limit of P in Ge determined at 800°C. The millisecond-flashlamp annealing process is used for the electrical activation of the implanted P dopant and to fully suppress its diffusion. The study of the P activation and distribution in implanted GeOI relies on the combination of Raman spectroscopy, conductive atomic force microscopy, and secondary ion mass spectrometry. The linear dependence between the Fano asymmetry parameter q and the active carrier concentration makes Raman spectroscopy a powerful tool to study the electrical properties of semiconductors. We also demonstrate the high electrical activation efficiency together with the formation of ohmic contacts through Ni germanidation via a single-step flashlamp annealing process.

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Junctionless nanowire transistor fabricated with high mobility Ge channel

Cited by 19 publications

References 14 publications

Chemical approaches for doping nanodevice architectures

Chemical approaches for doping nanodevice architectures

Effect of channel doping profiles on performance of germanium-on-insulator based junctionless transistors

Nanoscale n++-p junction formation in GeOI probed by tip-enhanced Raman spectroscopy and conductive atomic force microscopy

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