Key Generation for Hardware Obfuscation Using Strong PUFs

Abstract

As a result of the increased use of contract foundries, intellectual property (IP) theft, excess production and reverse engineering are major concerns for the electronics and defense industries. Hardware obfuscation and IP locking can be used to make a design secure by replacing a part of the circuit with a key-locked module. In order to ensure each chip has unique keys, previous work has proposed using physical unclonable functions (PUF) to lock the circuit. However, these designs are area intensive. In this work, we propose a strong PUF-based hardware obfuscation scheme to uniquely lock each chip. Author Contributions: Conceptualization, M.S.E.Q. and J.A.C.; Methodology, M.S.E.Q.; Software, M.S.E.Q.; Supervision, J.A.C.; Validation, M.S.E.Q. and J.A.C.; Formal analysis, M.S.E.Q. and J.A.C.; Visualization, J.A.C.; Data curation, M.S.E.Q.; Project administration, J.A.C.; Writing-original draft preparation, M.S.E.Q.; Writing-review and editing, M.S.E.Q. and J.A.C.; Project administration, J.A.C. Funding: This research received no external funding. Conflicts of Interest:The authors declare no conflict of interest.

FPGA-Based PUF Designs: A Comprehensive Review and Comparative Analysis

“…Kumar et al [72] provide a detailed explanation of a public/private key pair-based strategy for safeguarding the use of intellectual property cores in FPGAs. [129], (b) key sharing [130], (c) authentication [131], (d) software protection [132], (e) random number generation [16], (f) key generation [133], (g) ID generation [104] and (h) logic obfuscation [134].…”

“…To further provide stronger authentication and data encryption in IoT devices, the PUF-based obfuscation model is applied to the advanced encryption standard (AES) IP core. Quadir et al [134] proposed the key generation using strong PUFs for a hardware obfuscation scheme to uniquely lock each chip. This PUF-based hardware obfuscation method is evaluated on different ISCAS 85 benchmarks and also analyzed based on performance analysis.…”

“…Figure 20. Applications of FPGA-based PUFs in various domains (a) IP protection[129], (b) key sharing[130], (c) authentication[131], (d) software protection[132], (e) random number generation[16], (f) key generation[133], (g) ID generation[104] and (h) logic obfuscation[134].…”