Kickstarting High-performance Energy-efficient Manycore Architectures with Epiphany

Olofsson, Andreas; Nordström, Tomas; Ul-Abdin, Zain

doi:10.48550/arxiv.1412.5538

Cited by 1 publication

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“…Fabricated on the 65 nm process, the Epiphany III consumes 594 mW for an energy efficiency of 32.3 GFLOPS per watt [Olofsson, personal communication]. The 64-core Epiphany IV, fabricated on the 28 nm process, has demonstrated energy efficiency exceeding 50 GFLOPS per watt [14].…”

Section: Introductionmentioning

confidence: 99%

Parallel programming model for the Epiphany many-core coprocessor using threaded MPI

Ross

Richie²,

Park

et al. 2016

Microprocessors and Microsystems

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The Adapteva Epiphany many-core architecture comprises a 2D tiled mesh Network-on-Chip (NoC) of low-power RISC cores with minimal uncore functionality. It offers high computational energy efficiency for both integer and floating point calculations as well as parallel scalability. Yet despite the interesting architectural features, a compelling programming model has not been presented to date. This paper demonstrates an efficient parallel programming model for the Epiphany architecture based on the Message Passing Interface (MPI) standard. Using MPI exploits the similarities between the Epiphany architecture and a conventional parallel distributed cluster of serial cores. Our approach enables MPI codes to execute on the RISC array processor with little modification and achieve high performance. We report benchmark results for the threaded MPI implementation of four algorithms (dense matrix-matrix multiplication, N-body particle interaction, a five-point 2D stencil update, and 2D FFT) and highlight the importance of fast intercore communication for the architecture.

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Section: Introductionmentioning

confidence: 99%