2022
DOI: 10.1038/s41467-022-31887-z
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Large-area transfer of two-dimensional materials free of cracks, contamination and wrinkles via controllable conformal contact

Abstract: The availability of graphene and other two-dimensional (2D) materials on a wide range of substrates forms the basis for large-area applications, such as graphene integration with silicon-based technologies, which requires graphene on silicon with outperforming carrier mobilities. However, 2D materials were only produced on limited archetypal substrates by chemical vapor deposition approaches. Reliable after-growth transfer techniques, that do not produce cracks, contamination, and wrinkles, are critical for la… Show more

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Cited by 58 publications
(28 citation statements)
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“…With the increase of the layer thickness of graphene, the value of I 2D /I G was decreased from 2 to 0.4, and a blue-shifted 2D band with an increased FWHM(2D) from 28 to 60 cm −1 was also observed. Electrical transport measurements were conducted on a dual-gate Hall bar device, in which bilayer graphene was transferred onto the 300-nm-thick SiO 2 /Si substrate with a semi-dry transfer method, 23 and a film of 15-nm-thick HfO 2 was utilized as the top gate dielectric. The resistance as a function of top gate voltage at room temperature is demonstrated in Figure 3a, and the carrier mobilities are obtained as 2183 cm 2 V −1 s −1 for holes and 1099 cm 2 V −1 s −1 for electrons, respectively (see more details in Supporting Notes and Figure S7).…”
Section: ■ Results and Discussionmentioning
confidence: 99%
See 2 more Smart Citations
“…With the increase of the layer thickness of graphene, the value of I 2D /I G was decreased from 2 to 0.4, and a blue-shifted 2D band with an increased FWHM(2D) from 28 to 60 cm −1 was also observed. Electrical transport measurements were conducted on a dual-gate Hall bar device, in which bilayer graphene was transferred onto the 300-nm-thick SiO 2 /Si substrate with a semi-dry transfer method, 23 and a film of 15-nm-thick HfO 2 was utilized as the top gate dielectric. The resistance as a function of top gate voltage at room temperature is demonstrated in Figure 3a, and the carrier mobilities are obtained as 2183 cm 2 V −1 s −1 for holes and 1099 cm 2 V −1 s −1 for electrons, respectively (see more details in Supporting Notes and Figure S7).…”
Section: ■ Results and Discussionmentioning
confidence: 99%
“…Specifically, the suspended graphene membrane on the commercial TEM grid was fabricated via a polymer-free transfer method . Thermal release tape was used for the semi-dry transfer of bilayer graphene to fabricate a Hall bar device . Besides, a poly­(methyl methacrylate) (PMMA)-assisted method was utilized to transfer graphene onto SiO 2 /Si and quartz substrates for Raman and optical transmittance characterization, respectively …”
Section: Methodsmentioning
confidence: 99%
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“…On the other hand, exfoliation-based deposition and fine-patterning of the TMDC monolayer are the major obstacles to their application in large-area AM displays. Although technologies for high-resolution and large-scale fabrication have consistently progressed [ 49 , 50 , 51 ], they need to be developed more to satisfy customer expectations for large-sized displays.…”
Section: Non-si Tft Backplane Technologymentioning
confidence: 99%
“…Wafer-scale single-crystal graphene can be mass-produced on several kinds of substrates, such as Cu(111) (1,2), Cu-Ni alloy (3), and Cu(111)/Al 2 O 3 (0001) (4). The graphene can then be transferred to a target substrate surface (5)(6)(7), providing an attractive platform for fabricating III-nitride semiconductor devices. On such a platform, graphene can be used to alter the epitaxial relationship between the III-nitride semiconductor and the substrate, leading to single-crystal films on arbitrary substrates such as single-crystal Al 2 O 3 (8,9) and polycrystalline diamond (10).…”
Section: Introductionmentioning
confidence: 99%