Laser Thermal Annealing: A low thermal budget solution for advanced structures and new materials

Abstract

With the growing demand for improved performance, increased storage capacity and more functionality, the industry is facing challenges which require disruptive solutions. With the introduction of 3D geometries (e.g. FinFET) and of active layer stacking (e.g. sensors), annealing of 3D architectures is a major challenge for future generation devices. The drive towards lower power consumption and better thermal management leads to the integration of alternatives to Si, materials for which the thermal budget has to be carefully controlled, e.g. Ge and III-Vs for logic or SiC and GaN for power devices. A promising approach is Laser Thermal Annealing (LTA), an ultrafast and low thermal budget process in production for the passivation of backside illuminated sensors and power devices. The high temperature annealing region is restricted to thin layers while keeping underlying layers at low temperature. An ultrafast annealing time and proper Laser parameters may achieve high performance and high yield process, locking-in the surface properties without damaging buried device layers. We present here a review of LTA applications including recent work in memory.

Impact of UV Nanosecond Laser Annealing on Composition and Strain of Undoped Si0.8Ge0.2 Epitaxial Layers

“…Then, samples underwent pulsed laser annealing in pure N 2 . A SCREEN-LT3100 system, based on a XeCl excimer laser (308 nm wavelength and ∼145 ns FWHM pulse duration), 16 was used to that end. 15 × 15 mm 2 fields were exposed to single laser pulses at various energy density values, ranging from 1.40 to 2.40 J/cm 2 .…”

Silicon and Silicon Carbide Recrystallization by Laser Annealing: A Review

“…The high-temperature annealing region is restricted to thin layers while keeping underlying layers at low temperatures. An ultrafast annealing time and proper laser parameters may achieve high performance and high yields, locking in the surface properties without damaging buried device layers [20].…”

Activation Enhancement and Grain Size Improvement for Poly-Si Channel Vertical Transistor by Laser Thermal Annealing in 3D NAND Flash

“…To transition to the higher dopant activation process, laser thermal annealing (LTA) can achieve and meet the requirements of a low thermal budget. The LTA is well applied in power devices extending the Si-based devices with μm-scale deep activation [ 13 , 14 , 15 ], CMOS logic, and 3D sequential integration for active area formation and source/drain activation [ 16 , 17 , 18 ]. However, LTA has been less studied for memory applications compared with these fields.…”