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With the growing demand for improved performance, increased storage capacity and more functionality, the industry is facing challenges which require disruptive solutions. With the introduction of 3D geometries (e.g. FinFET) and of active layer stacking (e.g. sensors), annealing of 3D architectures is a major challenge for future generation devices. The drive towards lower power consumption and better thermal management leads to the integration of alternatives to Si, materials for which the thermal budget has to be carefully controlled, e.g. Ge and III-Vs for logic or SiC and GaN for power devices. A promising approach is Laser Thermal Annealing (LTA), an ultrafast and low thermal budget process in production for the passivation of backside illuminated sensors and power devices. The high temperature annealing region is restricted to thin layers while keeping underlying layers at low temperature. An ultrafast annealing time and proper Laser parameters may achieve high performance and high yield process, locking-in the surface properties without damaging buried device layers. We present here a review of LTA applications including recent work in memory.

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