We present the results of our computational
study on
the electrical
characteristics of vertical tunneling field-effect transistors (VT-FETs)
based on one- and two-dimensional (1D and 2D) configurations of the
Gr/BC2N/BC6N heterostructure (2D-VT-FET1 and
NR-VT-FET1). In a similar set of heterostructure NR-VT-FET1, we replace
the source (Gr) and drain (BC6N) with BC2N′
and the barrier (BC2N) with hBN (i.e., BC2N′/hBN/BC2N′), labeled as NR-VT-FET2. To obtain the device characteristics
[i.e., I
ON/I
OFF ratio, subthreshold swing (SS), and the gate time delay], we employ
a nonequilibrium Green function formalism with an atomistic tight-binding
(TB) approximation. To acquire the TB parameters, we fit the TB band
structure results to those obtained from the density functional theory.
The numerical results show that increasing the number of barrier layers
in either set of NR-VT-FETs improves the I
ON/I
OFF ratio and SS, degrading the gate
delay. Furthermore, as the ribbon width in the set of VT-FET1 increases,
the related I
ON/I
OFF ratio decreases. The results also show that, at room temperature,
the current modulation as high as ∼2.66 × 1010 (1.72 × 109) is obtained for the NR-VT-FET1(2) when
biased at 0.5 (0.6) V. These results show remarkable improvements
in comparison with the current modulation obtained from the lateral
and vertical tunneling transistors reported earlier. The corresponding
SS is as low as 27.63 (25.66) mV/decade. The parameters obtained for
the NR-VT-FET1 satisfy the International Technology Roadmap for Semiconductors
and International Roadmap for Devices and Systems. These VT-FETs can
be suitable for sensor applications due to their low SS.