Lateral GaN MISFETs Fabricated in Mg Ion Implanted Layer

Abstract

This paper demonstrates ion implanted lateral GaN MISFETs using double ion implantation technology, which enables us to form Si ion implanted source/drain regions in Mg ion implanted p-well fabricated on free-standing GaN substrates. Maximum drain current of 39 mA/mm and maximum transconductance of 4.5 mS/mm for GaN MISFET with a gate length of 2 μm at an estimated Mg surface concentration of 2.2 × 1018cm-3were obtained. A threshold voltage was-0.5 V for the device. These results show that we successfully formed Si ion implanted n-type regions in the Mg ion-implanted layer and achieved innovative performance.