“…6 It is found that the lower experimental mobility arises from two intrinsic challenges: (i) metal–semiconductor interface contacts, where the presence of defect-induced gap states can suppress the carrier-injection efficiency, leading to both Fermi level pinning and Schottky barriers; 7–9 (ii) electron transport in semiconductor channels, mainly influenced by Coulomb impurities near the semiconductor–dielectric interface, charge traps, defects, etc. 10–12 Therefore, further electronic performance optimization of MoS 2 devices by reducing contact resistance, enhancing carrier transport, and improving the mobility is the central task to tackle the application challenges of transistors.…”