Leakage current mechanism in sub-micron polysilicon thin-film transistors

Olasupo, K.R.; Hatalis, Miltiadis K.

doi:10.1109/16.506772

Cited by 125 publications

(76 citation statements)

References 5 publications

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“…Submicron TFT's suffer from performance variations caused by statistical variations in the number of grains within the channel [3]. They also suffer from high leakage caused by trap-assisted carrier generation in defects in the drain depletion region [4]. Advances in lateral crystallization technology, such as nickel-induced [5] and germanium-induced lateral crystallization [6], allow control over grain location.…”

Section: Introductionmentioning

confidence: 99%

Low-leakage germanium-seeded laterally-crystallized single-grain 100-nm TFTs for vertical integration applications

Subramanian

Toita

Ibrahim

et al. 1999

IEEE Electron Device Lett.

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Abstract-We report on 100-nm channel-length thin-film transistors (TFT's) that are fabricated using germanium-seeded lateral crystallization of amorphous silicon. Germanium-seeding allows the fabrication of devices with control over grain boundary location. Its effectiveness improves with reduced device geometry, allowing "single-grain" device fabrication. In the first application of this technology to deep submicron devices, we report on 100-nm devices having excellent performance compared to conventional TFT's, which have randomly located grains. Devices have on-off ratio >10 6 and subthreshold slope of 107 mV/decade, attesting to the suitability of germanium-seeding for the fabrication of high-performance TFT's, suitable for use in vertically integrated three-dimensional (3-D) circuits.

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Section: Introductionmentioning

confidence: 99%

Low-leakage germanium-seeded laterally-crystallized single-grain 100-nm TFTs for vertical integration applications

Subramanian

Toita

Ibrahim

et al. 1999

IEEE Electron Device Lett.

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“…These improvements were attributed to the reduction in Ni concentration in the GETR-POLY film. In the poly-Si film, Ni residues serve as deep-level traps, which promote thermionic emissiondominated leakage current in the low-gate and drain-voltage region [18], [19]. With the reduction in Ni concentration, the minimum leakage current was reduced, thus increasing the ON/OFF current ratio.…”

Section: Resultsmentioning

confidence: 97%

Improving the Electrical Properties of NILC Poly-Si Films Using a Gettering Substrate

2007

IEEE Electron Device Lett.

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Abstract-Ni-metal-induced lateral crystallization (NILC) of amorphous silicon (α-Si) has been employed to fabricate polycrystalline silicon (poly-Si) thin-film transistors. However, current crystallization technology often leads to Ni and NiSi 2 precipitates being trapped, thus degrading the performance of the device. We proposed using α-Si-coated wafers as Ni-gettering substrates. After bonding the gettering substrate with the NILC poly-Si film, both the Ni-metal impurity within the NILC poly-Si film and the leakage current were greatly reduced, thus increasing the ON/OFF current ratio.

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“…13 In n-type NILC poly-Si TFTs, Ni residues play the role of deep-level traps, which promote thermionicemission-dominated leakage current. 14,15 Hence, leakage current can be easily induced at higher V D . With the reduction of the Ni concentration, the minimum leakage current (measured at V D = 5 V) was reduced, and the on/off current ratio of the GETR TFTs was thus increased.…”

Section: Resultsmentioning

confidence: 99%

Using Phosphorus-Doped α-Si Gettering Layers to Improve NILC Poly-Si TFT Performance

Wang

2009

Journal of Elec Materi

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Ni-metal-induced lateral crystallization (NILC) has been utilized to fabricate polycrystalline silicon (poly-Si) thin-film transistors (TFTs). However, the current crystallization technology often leads to trapped Ni and NiSi 2 precipitates, thus degrading device performance. In this study, phosphorus-doped amorphous silicon (p-a-Si) and chemical oxide (chem-SiO 2 ) films were used as Ni-gettering layers. After a gettering process, the Ni impurity within the NILC poly-Si film and the leakage current were both reduced, while the on/off current ratio was increased. This gettering process is compatible with NILC TFT processes and suitable for large-area NILC poly-Si films.

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Leakage current mechanism in sub-micron polysilicon thin-film transistors

Cited by 125 publications

References 5 publications

Low-leakage germanium-seeded laterally-crystallized single-grain 100-nm TFTs for vertical integration applications

Low-leakage germanium-seeded laterally-crystallized single-grain 100-nm TFTs for vertical integration applications

Improving the Electrical Properties of NILC Poly-Si Films Using a Gettering Substrate

Using Phosphorus-Doped α-Si Gettering Layers to Improve NILC Poly-Si TFT Performance

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