Leveraging Independent Double-Gate FinFET Devices for Machine Learning Classification

Kenarangi, Farid; Partin-Vaisband, Inna

doi:10.1109/tcsi.2019.2927441

Cited by 14 publications

(10 citation statements)

References 30 publications

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“…Emerging device technologies are also being considered for providing power and area efficient alternatives for the conventional CMOS based classifiers. Accuracy of 90% and energy of 25 pJ per decision has been recently reported in [20], [21].…”

Section: Introductionmentioning

confidence: 93%

A Single-MOSFET MAC for Confidence and Resolution (CORE) Driven Machine Learning Classification

Kenarangi¹,

Partin-Vaisband²

2019

Preprint

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Mixed-signal machine-learning classification has recently been demonstrated as an efficient alternative for classification with power expensive digital circuits. In this paper, a high-COnfidence high-REsolution (CORE) mixed-signal classifier is proposed for classifying high-dimensional input data into multiclass output space with less power and area than state-of-the-art classifiers. A high-resolution multiplication is facilitated within a single-MOSFET by feeding the features and feature weights into, respectively, the body and gate inputs. High-resolution classifier that considers the confidence of the individual predictors is designed at 45 nm technology node and operates at 100 MHz in subthreshold region. To evaluate the performance of the classifier, a reduced MNIST dataset is generated by downsampling the MNIST digit images from 28 × 28 features to 9 × 9 features. The system is simulated across a wide range of PVT variations, exhibiting nominal accuracy of 90%, energy consumption of 6.2 pJ per classification (over 45 times lower than state-of-the-art classifiers), area of 2,179 µm 2 (over 7.3 times lower than state-ofthe-art classifiers), and a stable response under PVT variations.

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Section: Introductionmentioning

confidence: 93%

A Single-MOSFET MAC for Confidence and Resolution (CORE) Driven Machine Learning Classification

Kenarangi¹,

Partin-Vaisband²

2019

Preprint

Self Cite

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“…6. Voltage waveforms of the sensing lines during the precharge (i.e., (0, 6), (10,16), and (20, 26) nanosecond time intervals) and classification stages (i.e., (6,10), (16,20), and (26, 30) nanosecond time intervals) for three consecutive input features (i.e., 7, 2, and 1). The votes extracted during each period are shown below the waveforms.…”

Section: A Ovo Multi-class Classification Schemementioning

confidence: 99%

“…Emerging device technologies are also being considered for providing power and area efficient alternatives for the conventional CMOS based classifiers [14]. Accuracy of 90% and energy of 25 pJ per decision has been recently reported in [15], [16].…”

mentioning

confidence: 99%

A Single-MOSFET Analog High Resolution-Targeted (SMART) Multiplier for Machine Learning Classification

Kenarangi

Partin-Vaisband

2021

IEEE J. Emerg. Sel. Topics Circuits Syst.

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Mixed-signal machine-learning classification has recently been demonstrated as an efficient alternative for classification with power expensive digital circuits. In this paper, a single-MOSFET analog multiplier is proposed for classifying high-dimensional input data into multi-class output space with less power and higher accuracy than state-of-the-art mixed-signal linear classifiers. A high-resolution (i.e., multi-bit) multiplication is facilitated within a single-MOSFET by feeding the features and feature weights into, respectively, the body and gate inputs. Highresolution classifier that considers the decisions of the individual predictors is designed at 180 nm technology node and operates at 100 MHz in near/subthreshold region. To evaluate the performance of the classifier, a reduced MNIST dataset is generated by downsampling the MNIST digit images from 784 features to 48 features. The system is simulated across a wide range of PVT variations, exhibiting average accuracy of 92% (2% improvement over state-of-the-art), energy consumption of 67.3 pJ per classification (over 8 times lower than state-of-the-art classifiers), area of 27,570 µm 2 per binary classifier, and a stable response under PVT variations. Finally, to provide ground for future work on ultra-low-power deep and convolutional networks, scalability and robustness of the proposed multiplier is evaluated with a convolutional neural network on CIFAR-10. Similar classification accuracy with digital and SMART hardware has been observed. All the code and simulation files are available at an online public GitHub repository, https://github.com/faridken/SMART-Multiplier-for-ML.

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“…4, exhibiting p-type (red), n-type (blue), and OFF (gray) operational regions. In typical mixed-signal ML classifiers, positive and negative classification decisions are separately accumulated on the individual sensing lines [2], [5], [6], [19]. Thus, at least two wires are required for a single MAC operation.…”

Section: B Electrical Characteristics Of the Ap-cnfetmentioning

confidence: 99%

Exploiting Dual-Gate Ambipolar CNFETs for Scalable Machine Learning Classification

Kenarangi¹,

Huang²,

Liu³

et al. 2019

Preprint

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Ambipolar carbon nanotube based field-effect transistors (AP-CNFETs) exhibit unique electrical characteristics, such as tri-state operation and bi-directionality, enabling systems with complex and reconfigurable computing. In this paper, AP-CNFETs are used to design a mixed-signal machine learning (ML) classifier. The classifier is designed in SPICE with feature size of 15 nm and operates at 250 MHz. The system is demonstrated based on MNIST digit dataset, yielding 90% accuracy and no accuracy degradation as compared with the classification of this dataset in Python. The system also exhibits lower power consumption and smaller physical size as compared with the state-of-the-art CMOS and memristor based mixedsignal classifiers.

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Leveraging Independent Double-Gate FinFET Devices for Machine Learning Classification

Cited by 14 publications

References 30 publications

A Single-MOSFET MAC for Confidence and Resolution (CORE) Driven Machine Learning Classification

A Single-MOSFET MAC for Confidence and Resolution (CORE) Driven Machine Learning Classification

A Single-MOSFET Analog High Resolution-Targeted (SMART) Multiplier for Machine Learning Classification

Exploiting Dual-Gate Ambipolar CNFETs for Scalable Machine Learning Classification

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