Life test of an X-band MMIC multi-function chip for active phased array radar applications

Jeong, Jin-Cheol; Kwak, Changsoo; Yom, In‐Bok; Seo, Injong; Jo, Inho

doi:10.1016/j.microrel.2015.02.002

Cited by 6 publications

(3 citation statements)

References 4 publications

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“…However, comparing with the 0.5 μm GaAs E/D pHEMT process, which is commonly used for the MFC designs in X-band, the cost of the 0.18 μm process is much larger. Compared with other published MFCs with the same 0.5 μm process, our design shows higher integration, the size of which is much smaller than the average 4 × 5 mm 2 [13]. Furthermore, the 3.5 × 4.5 mm 2 size of our MFC successfully approaches the above 4 × 3.7 As shown in Figure 9a,b, the input and output return losses of MFC are more than 19 dB in both channels.…”

Section: Measurement Resultsmentioning

confidence: 72%

A 7.5–9 GHz GaAs Two-Channel Multi-Function Chip

Zhou

Zhang

et al. 2019

Electronics

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Based on the 0.5 μm GaAs enhancement/depletion (E/D) Pseudomorphic High Electron Mobility Transistor (pHEMT) process, a 7.5–9 GHz two-channel amplitude phase control multi-function chip (MFC) was developed successfully. The chip was integrated with a 6-bit digital phase shifter, a 6-bit digital attenuator, and a single pole single throw (SPST) switch in each channel. A design for the absorptive SPST switch is deployed to optimize the return loss and control channel array calibration. In the 8 dB and 16 dB attenuation bit, a switched-path-type topology is employed in order to obtain a good flatness of attenuation characteristic and achieve low additive phase shift. A 27-bit serial-to-parallel converter (SPC) was introduced to decrease the control lines and pads of the chip, and the power consumption was less than 70 mW. The measurement result shows that the insertion loss is less than −13 dB and the return loss is better than −19 dB. In both channels, the 64-state root mean square (RMS) errors of the phase shifter is less than 2° and the RMS parasitic amplitude error is less than 0.2 dB. The RMS attenuation error is less than 0.45 dB and the RMS parasitic phase error is less than 2.4°. The size of the chip is 3.5 mm × 4.5 mm.

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Section: Measurement Resultsmentioning

confidence: 72%

A 7.5–9 GHz GaAs Two-Channel Multi-Function Chip

Zhou

Zhang

et al. 2019

Electronics

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“…Even if practically negligible, this represents a slight alteration in the load of the last bit with respect to all other bits, therefore in [18] an extra bit is included to be used specifically for the data output line. In [20] the number of SIPO bits is double than necessary so as to simultaneously load two different control words, containing, respectively, the receive-and transmit-mode CC configuration and stored in the even and off SIPO bits. Twelve multiplexers are then used to selectively send to the attenuator and phase shifter the proper word according to the CC operating mode which is given though an additional external input.…”

Section: Literature Overview Of Sipo Interfaces In Gaas Microwave Core-chipsmentioning

confidence: 99%

“…All these parameters are interdependent, thus achieving the best trade-off among them is a main design challenge and the most suitable implementation depends on the case, based on which one of these features has to be favored. Most of the SIPO examples available in the literature adopt the same DFFs for the SR and the HR [20,24,25,27,29,31,32]. This choice is surely the most convenient in terms of design effort and modularity, since, once the DFF cell is optimized, it is just replicated 2n times to create the two n-bit registers.…”

Section: Circuit Architecturementioning

confidence: 99%

GaAs-Based Serial-Input-Parallel-Output Interfaces for Microwave Core-Chips

et al. 2021

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Microwave core-chips are highly integrated MMICs that are in charge of all the beam-shaping functions of a transmit-receive module within a phased array system. Such chips include switches, amplifiers and attenuators, phase shifters, and possibly other elements, each to be controlled by external digital signals. Given the large number of control lines to be integrated in a core-chip, the embedding of a serial to parallel interface is indispensable. Digital design in compound semiconductor technology is still rather challenging due to the absence of complementary devices and the availability of a limited number of metallization layers. Moreover, in large arrays, high chip yield and repeatability are required. This paper discusses and compares challenges and solutions for the key sub-circuits of GaAs serial to parallel converters for core-chip applications, reviewing the pros and cons of the different implementations proposed in the literature.

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A Ka-band low power consumption MMIC core chip for T/R modules

Zhou

Wang

2018

AEU - International Journal of Electronics and Communications

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Life test of an X-band MMIC multi-function chip for active phased array radar applications

Cited by 6 publications

References 4 publications

A 7.5–9 GHz GaAs Two-Channel Multi-Function Chip

A 7.5–9 GHz GaAs Two-Channel Multi-Function Chip

GaAs-Based Serial-Input-Parallel-Output Interfaces for Microwave Core-Chips

A Ka-band low power consumption MMIC core chip for T/R modules

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