Limit cycles in a digitally controlled buck converter

Bradley, Mark; Feely, Orla; Teplinsky, A.

doi:10.1109/ecctd.2011.6043328

Cited by 8 publications

(11 citation statements)

References 5 publications

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“…In order to prevent a limit cycle on two duty cycle levels from being possible, therefore a sufficient condition is that the largest amplitude limit cycle is confined to being within the zero-error bin, as was found in [7]. The peak-topeak largest amplitude limit cycle is approximately given by in (10) which yields p pk ≈ 0) and thus the condition…”

Section: Kpmentioning

confidence: 99%

“…However, unlike the case in [7], the frequency of these limit cycles is not fixed, and depends on the gain coefficients K p and K i , as well as the position of the reference voltage with respect to the fixed points.…”

Section: Model Of Systemmentioning

confidence: 99%

“…LIMIT CYCLES ON TWO DUTY CYCLE LEVELS Limit cycles in the system occur when an oscillation happens over two or more duty cycle levels. As in the case in [7], these may be single-loop limit cycles, in which a trajectory rotates once around the fixed points in the (v, u)-plane in an almost circular fashion before returning to the point it started at, or multiple-loop limit cycles, in which a trajectory rotates several times around the fixed points in the (v, u)-plane before returning to the point it started at.…”

Section: Model Of Systemmentioning

confidence: 99%

“…d c is then quantized to a signal d by the DPWM, which opens and closes the switches as previously described. In what follows, we shall assume that all circuit components are ideal, except for the capacitor, the equivalent series resistance (ESR) of which is given by r c , which was not included in [7], that the error voltage v e is sampled at the frequency f s = The buck circuit is described by the equations T , and (1) becomes…”

Section: Model Of Systemmentioning

confidence: 99%

“…Ref. [7] analysed a digitally controlled buck converter with an integral controller, and conditions for the prevention of limit cycles in this system were derived. In this paper, we extend this form of analysis to a system with a PI controller.…”

Section: Introductionmentioning

confidence: 99%

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Analysis of limit cycles in a PI digitally controlled buck converter

Bradley

Alarcón

Feely

2012

2012 IEEE International Symposium on Circuits and Systems

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Digital control of power converters has been an\ud area of considerable research interest in recent times. One of\ud the problems which arises in these systems is that of the limit\ud cycle oscillations that occur due to quantization in the feedback\ud loop. This paper investigates the limit cycle oscillations that occur\ud in the digitally controlled version of the buck converter with a\ud proportional-integral controller. The amplitude and frequency\ud of the oscillations that may occur on two duty cycle levels are\ud investigated and related to the controller gain parameters. The\ud analysis shows that it is not possible to guarantee that limit\ud cycle oscillations on two levels will not occur simply by adjusting\ud the gain parameters, and yields a condition which will prevent\ud oscillations on two levels from occurring.Postprint (published version

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Section: Kpmentioning

confidence: 99%

Section: Model Of Systemmentioning

confidence: 99%

Section: Model Of Systemmentioning

confidence: 99%

Section: Model Of Systemmentioning

confidence: 99%

Section: Introductionmentioning

confidence: 99%

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Analysis of limit cycles in a PI digitally controlled buck converter

Bradley

Alarcón

Feely

2012

2012 IEEE International Symposium on Circuits and Systems

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Design of robust digitally controlled DC–DC converters in the presence of strong interference

Hayes

Condon

Giaouris

2017

Circuit Theory & Apps

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One of the main advantages of digital control is the ability to design more sophisticated control strategies to enable high‐performance dc–dc converters. One such example is a buck converter operating with a digital state‐feedback controller. Previous works characterise the nonlinear dynamics of such systems under ideal operating conditions. However, in practical applications, these conditions cannot be guaranteed. The focus of this work is on the behaviour of such systems when they operate in the presence of strong interference signals. Previous works on the effect of noise have shown that intermittent operation is possible when the frequency of the noise signal is close to the switching frequency. Intermittent operation can be characterised by long periods of stable operation interspersed with periods of unstable or chaotic operation, which greatly downgrade the efficiency and performance of the converter and reduce its lifetime as for example increase the current ripple or add extra AC components at its output. Typically, such behaviour is avoided by modifying the circuit parameters. However, little or no work exists on developing design guidelines in order to effect its elimination. This is the focus of this research, that is, by utilising Filippov's theory on discontinuous differential equations, to set out a design procedure that can be applied to any dc–dc converter, to tune its controller in order to eliminate intermittent operation. As a case study, the digitally controlled buck converter with a state‐feedback control law is selected. Copyright © 2017 John Wiley & Sons, Ltd.

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Control of limit cycles in buck converters

Condon

Hayes

2014

COMPEL: The International Journal for Computation and Mathematics in Electrical and Electronic Engineering

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Purpose -The purpose of this paper is to investigate limit cycles in digitally Proportional, Integral and Derivative (PID) controlled buck regulators. Filtering is examined as a means of removing the limit cycles in digitally controlled buck regulators. Design/methodology/approach -The paper explains why limit cycles occur in a digitally PID controlled buck converter. It then proceeds to propose two filters for their elimination. Results indicate the effectiveness of each of the filters. Findings -The paper gives a mathematical analysis of the occurrence of limit cycles in digitally controlled PID buck regulators. It finds that notch and comb filters are effective for the purpose of eliminating limit cycles in buck regulators. Originality/value -The paper employs a model of the buck regulator inclusive of the inductor loss -this was not done to date for this type of work. The paper analyses PID control. This was not done in the manner given. The paper addresses filtering as a means of removing limit cycles. It examines the effect of changing the digital controller parameters on the requirements of the filters.

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Limit cycles in a digitally controlled buck converter

Cited by 8 publications

References 5 publications

Analysis of limit cycles in a PI digitally controlled buck converter

Analysis of limit cycles in a PI digitally controlled buck converter

Design of robust digitally controlled DC–DC converters in the presence of strong interference

Control of limit cycles in buck converters

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