LISA—machine description language for cycle-accurate models of programmable DSP architectures

Pees, Stefan; Hoffmann, Andreas; Zivojnovic, V.; Meyr, H.

doi:10.1145/309847.310101

Cited by 121 publications

(45 citation statements)

References 4 publications

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“…An explorer with performance estimator is shown in Figure 2. Examples of such approaches are [4][5][6][7][8][9][10][11][12][13][14][15].…”

Section: Fig 1: Asip Design Methodologymentioning

confidence: 99%

ADA: Applications Define ASIP

Jain¹

2014

IJCA

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Interest in Application Specific Instruction set Processors or ASIPs has increased significantly. Sincere efforts have been put in improving ASIP design methodologies in industry as well as in academia. By the close observation and analysis of these approaches, it was found that though the existing approaches are focusing on making the process automatic and providing better GUI to help the designers, core technique used in deciding the suitable architecture (processor and memory) is based on design space exploration. This exploration is done with the help of estimators. Such estimators are either simulator based or scheduler based. This study identifies that both types of techniques are very far from the ideal dream technique in which applications should have defined the suitable architecture configuration and these techniques are becoming unsuitable in current scenario. Each problem has a solution hidden in it. This scenario motivated us to propose a novel and revolutionary ASIP design technique making the dream true. The Proposed technique does not focuses on design space exploration, it focuses on directly defining processors for given applications rather than searching for suitable configuration in a jungle of configurations can be suggested by the architecture design space. General TermsComputer Architecture, Processor Design, Processor Design Technology.

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“…An explorer with performance estimator is shown in Figure 2. Examples of such approaches are [4][5][6][7][8][9][10][11][12][13][14][15].…”

Section: Fig 1: Asip Design Methodologymentioning

confidence: 99%

ADA: Applications Define ASIP

Jain¹

2014

IJCA

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“…The design procedure starts with a processor description in the LISA language [18]. This description is processed by the CoWare Processor Designer [19] to generate a Verilog description of the processor and the required software development tools, such as an assembler and a linker.…”

Section: Memtrace With a Processor Model Generatormentioning

confidence: 99%

Profiling-Based Hardware/Software Co-Exploration for the Design of Video Coding Architectures

Hübert

Stabernack

2009

IEEE Trans. Circuits Syst. Video Technol.

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Abstract-The design of embedded hardware/software systems is often subject to strict requirements concerning its various aspects, including real-time performance, power consumption, and die area. Especially for data intensive applications, the number of memory accesses is a dominant factor for these aspects. In order to meet the requirements and design a welladapted system, the software parts need to be optimized and an adequate system and processor architecture needs to be designed. In this paper, we focus on finding an optimized memory hierarchy for bus-based architectures. Additionally, useful instruction set extensions for application-specific processor cores are explored. For complex applications, this design space exploration is difficult and requires in-depth analysis of the application and its implementation alternatives. Tools are required which aid the designer in the design, optimization, and scheduling of hardware and software. We present a profiling tool for fast and accurate performance, power, and memory access analysis of embedded systems. This paper shows how the tool can be applied for an efficient hardware/software co-exploration within the design flow of processor-centric architectures. This concept has been proven in the design of a mixed hardware/software system with multiple processing units for video decoding.

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“…Then, different processor models are generated. For processor simulation purposes a model in the ADL language LISA [8] is generated. RTL models of the processor are also generated.…”

Section: Automatic Core Generationmentioning

confidence: 99%

A HW/SW design methodology for embedded SIMD vector signal processors

Robelly

Cichon

Ahlendorf

et al. 2008

IJES

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Abstract-SIMD processors have made their way from supercomputers architectures through embedded real-time signal processing. This trend has been driven by signal processing applications with heavy number-crunching requirements like for example base-band processing on mobile devices.Depending on the data dependencies of algorithms and implementation constraints like real-time, power consumption and die size, the necessary SIMD parallelism can be put into a piece of silicon for a certain application. This poses two challenges: On the one hand, the DSP core design has to be streamlined in such a way that changes on the architecture can be prototyped very fast. On the other hand, the algorithm design and its development have to be done independent of the level of SIMD parallelism available on the DSP in order to enable software reusability.In this paper we report our HW/SW methodology in order to design DSP cores and algorithms that exploit SIMD parallelism. On the hardware development side and taking as a starting point a novel hardware architectural template called STA 1 , we explain how with our approach we automatically generate simulation and hardware models of DSP cores with a scalable level of SIMD parallelism. On the software development side and based on an algebraic model that captures the SIMD computational model, we explain how algorithms can be designed independent of the available SIMD parallelism. We also report how this algebraic model can be easily expressed in Matlab syntax. This enables the automatic code generation from Matlab programs for our family of DSP cores.

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LISA—machine description language for cycle-accurate models of programmable DSP architectures

Cited by 121 publications

References 4 publications

ADA: Applications Define ASIP

ADA: Applications Define ASIP

Profiling-Based Hardware/Software Co-Exploration for the Design of Video Coding Architectures

A HW/SW design methodology for embedded SIMD vector signal processors

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