LIT - an automatic layout generation tool for trapezoidal association of transistors for basic analog building blocks

Girardi, Alessandro; Bampi, Sérgio

doi:10.1109/date.2003.1253756

Cited by 11 publications

(9 citation statements)

References 2 publications

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“…Also, saturation voltage is smaller compared to a conventional cascode configuration, what makes the trapezoidal associations very suitable for current mirrors blocks. We believe that these electrical characteristics, combined with layout regularity and design automation of layout made possible by the regular association [3], make these types of associations an important alternative for coping with the short channel effects in deep sub-micron analog design in digital CMOS technologies. …”

Section: Resultsmentioning

confidence: 99%

“…It is not a direct and intuitive task, because many options of associations exist. We developed a tool called LIT [3] for the analog circuits design using series-parallel associations of MOS transistors, from circuit sizing phase to layout description. Total time and costs can be reduced with this tool, moreover, design for manufacturability is also improved through layout regularity.…”

Section: Introductionmentioning

confidence: 99%

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Early voltage and saturation voltage improvement in deep sub-micron technologies using associations of transistors

Conrad

Cortes

Bampi

et al. 2008

Proceedings of the 21st Annual Symposium on Integrated Circuits and System Design

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The design of analog integrated circuits together with mixedsignal applications in deep sub-micron technologies is a difficult task, since state-of-the-art technologies and minimum channel length transistors, suitable for digital circuits, are very rarely optimized for analog block design. Non-desired effects are presenting in the shortest transistors, leading mainly to a high output conductance, which is disadvantageous for DC voltage gain stages. We present measurement results supporting the associations of transistors concept to be used in such applications: the T-Shaped Transistor (TST) [1]. The main characteristic of this association is its trapezoidal nature, with no limit on the sizes of the unit composite transistors, providing lower output conductance and saturation voltage in comparison to regular configurations. Such electrical characteristics are demonstrated by means of electrical simulations and electrical measurements of a test chip fabricated by MOSIS in an IBM 0.18µm CMOS process.

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Section: Resultsmentioning

confidence: 99%

Section: Introductionmentioning

confidence: 99%

Early voltage and saturation voltage improvement in deep sub-micron technologies using associations of transistors

Conrad

Cortes

Bampi

et al. 2008

Proceedings of the 21st Annual Symposium on Integrated Circuits and System Design

View full text Add to dashboard Cite

show abstract

“…A second version was designed using the TAT technique, in order to take advantage of its characteristics, specially the higher output resistance, when designing the current subtractor. Single transistors from the first version were automatically converted to TATs using the LIT tool [10]. This tool calculates the equivalent trapezoidal series-parallel association of uniform-sized transistors for single transistors in a given technology.…”

Section: Instrumentation Amplifier Implementationsmentioning

confidence: 99%

Design of an integrated low power high CMRR instrumentation amplifier for biomedical applications

Prior

Rodrigues

Aita

et al. 2008

Analog Integr Circ Sig Process

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The objective of this paper is to discuss the advantages and drawbacks of using Trapezoidal Association of Transistors (TAT) in the implementation of a lowpower high-CMRR CMOS instrumentation amplifier (IA) aimed for biomedical applications. IAs are well suited for biomedical applications due to its high CMRR. For the sake of comparison, two versions of the circuit were designed, prototyped and characterized. The performance of a version with its current mirrors implemented with TAT, where supposedly higher CMRR could be achievable, is compared to another with single-transistor implementation of current mirrors in order to analyze the CMRR performance. The IA circuit was designed in AMIS 1.5 lm technology and manufactured through the MOSIS Service. In addition to the better performance attained by the classic implementation of the amplifier, with CMRR higher than 120 dB, this version of the IA consumed less than one third of the area from the TAT version. Comparison of both versions from same topology indicates no advantages of using TATs in the current mirrors of this type of IA.

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“…Hence, mixed analog-digital circuits design can use this semi-custom technique, principally due to the possibility of design automation using TATs over a SOT array. The LIT tool, for example, allows the automation of the conversion of an analog circuit designed with single transistors in a circuit composed by TATs, including automatic layout synthesis [4].…”

Section: Introductionmentioning

confidence: 99%

AC analysis of an inverter amplifier using minimum-length trapezoidal association of transistors

Girardi¹,

Bampi²

2004

Microelectronics Reliability

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LIT - an automatic layout generation tool for trapezoidal association of transistors for basic analog building blocks

Cited by 11 publications

References 2 publications

Early voltage and saturation voltage improvement in deep sub-micron technologies using associations of transistors

Early voltage and saturation voltage improvement in deep sub-micron technologies using associations of transistors

Design of an integrated low power high CMRR instrumentation amplifier for biomedical applications

AC analysis of an inverter amplifier using minimum-length trapezoidal association of transistors

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